• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.12
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• pp.2420-2424
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• 2009

We have successfully demonstrated of metal-insulator-semiconductor (MIS) capacitors with $Al_2O_3/p-Si$ structures. The $Al_2O_3$ film was grown at $200^{\circ}C$ on H-terminated Si wafer by atomic layer deposition (ALD) system. Trimethylaluminum [$Al(CH_3)_3$, TMA] and $H_2O$ were used as the aluminum and oxygen sources. A cycle of the deposition process consisted of 0.1 s of TMA pulse, 10 s of $N_2$ purge, 0.1 s of $H_2O$ pulse, and 60 s of $N_2$ purge. The 5 nm thick $Al_2O_3$ layer prepared on Si substrate by ALD exhibited excellent electrical properties, including low leakage currents, no mobile charges, and a good interface with Si.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.9
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• pp.1386-1392
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• 1990

Characteristics of the direct thermal nitrided films by RF induction heating has been studied. The nitrided films on Si were prepared at 1000-1200\ulcorner in ammonia gas ambient. The nitrided films were analyzed by ellipsometry an Auger electron spectroscopy. I-V and C-V characteristics of MIS capacitors fabricated using nitrided film were investicated. The nitrided films were grown up mostly within initial thirty minutes and no significant growth was observed thereafter. Etch rates of films were about 1\ulcornermin in diluted HF (HF:H2O= 1:50). The nitrided films were resistant to dry and wet oxidations at temperatures below 1000\ulcorner and 900\ulcorner, respectively.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.3
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• pp.87-95
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• 1992

The electrical characteristics of Al/TaS12TOS15T/SiOS12T/Si metal insulator-semiconductor (MIS) capacitors were studied. Tantalum pentoxide thin films on SiOS12T/p-Si substrate have been prepared by thermal oxidation at 450-$600^{\circ}C$ of sputter deposited tantalum films. Composition and structures of the tantalum oxide films were examined by AES and XRD. From the C-V analysis, dielectric constant of TaS12TOS15T which were oxidized at 55$0^{\circ}C$ for 1h in OS12T were 18-23, the value depending on the oxidation and annealing temperature. The leakage current density was found to be about 10S0-10T-10S0-9T A/cmS02T at an applied electric field of 1 MV/cm. The dielectric breakdown strength of the tantalum oxide films annealed at 100$0^{\circ}C$ were in the range from 2.5MV/cm to 2.8 MV/cm.

• Journal of the Semiconductor & Display Technology
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• v.22 no.2
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• pp.87-95
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• 2023

TiO₂ thin films were grown using the Atomic Layer Deposition (ALD) and their structural and electrical properties were investigated. The crystal structure, dielectric constant, and surface roughness of the TiO₂ thin films grown by the ALD deposition method were studied. The grown TiO₂ thin films showed an anatase crystal structure, and their properties varied with temperature. In particular, the properties of the TiO₂ thin films were confirmed by changing the process temperature. The electrical properties of Metal-Insulator-Silicon (MIS) capacitor structures were analyzed using a probe station. The performance improvement of capacitors using TiO₂ as a dielectric was confirmed by measuring capacitance through Capacitance-Voltage (C-V) curves.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.12
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• pp.56-63
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• 1994

The effects of sulfur treatments on the barrier heithts of Schottky contacts and the interface-state density of metal-insulator-semiconductor (MIS) capacitors on InP have been investigated. Schottky contacts were formed by the evaporation of Al, Au, and Pt on n-InP substrate before and after (NH$_{4}$)$_{2}$S$_{x}$ treatments, respectively. The barrier height of InP Schottky contacts was measured by their current-voltage (I-V) and capacitance-voltage (C_V) characteristics. We observed that the barrier heights of Schottky contacks on bare InP were 0.35~0.45 eV nearly independent of the metal work function, which is known to be due to the surface Fermi level pinning. In the case of sulfur-treated Au/InP ar Pt/InP Schottky diodes, However, the barrier heights were not only increased above 0.7 eV but also highly dependent on the metal work function. We have also investigated effects of (NH$_{4}$)$_{2}$S$_{x}$ treatments on the distribution of interface states in Si$_{3}$N$_{4}$InP MIS diodes where Si$_{3}$N$_{4}$ was provided by plasma enhanced chemical vapor deposition (PECVD). The typical value of interface-state density extracted feom 1 MHz C-V curve of sulfur-treated SiN$_{x}$/InP MIS diodes was found to be the order of 5${\times}10^{10}cm^{2}eV^{1}$. This value is much lower than that of MiS diodes made on bare InP surface. It is certain, therefore, that the (NH$_{4}$)$_{2}$S$_{x}$ treatment is a very powerful tool to enhance the barrier heights of Au/n-InP and Pt/n-InP Schottky contacts and to reduce the density of interface states in SiN$_{x}$/InP MIS diode.

• Journal of the Korean Vacuum Society
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• v.2 no.2
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• pp.246-254
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• 1993

In order to increase the capacitance of storage electrode in the DRAM capacitor, two approaches were performed. First, hemispherical and rugged poly silicon films were made by LPCVD to increase the effective surface area of storage electrode. The even surface morphology of conventional poly silicon electrode was changed into the uneven surface of hemispherical of rugged poly silicon films. Second, PECVD $Ta_2O_5$ dielectric films were deposited and thermally treated to study the dielectrical characteristics of $Ta_2O_5$ film on each electrode. MIS capacitors with $Ta_2O_5$ films were electrically characterized by I-V, C-V and TDDB measurements. As a result, the capacitance of the electrode with uneven surface were increased by a factor of 1.2~1.5 and leakage current was increased compared with those of even surface. TDDB result indicates that the electrode with uneven surface has dielectrically more degraded than that of even surface. These results can be helpful as a basic research to develop new generation DRAM capacitors with $Ta_2O_5$ films.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.11
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• pp.765-770
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• 2001

Metal-ferroelectric-insulator- semiconductor(MFTS) devices by using rapid thermal annealed (RTA) LiNbO$_3$/AIN/Si(100) structures were successfully fabricated and demonstrated nonvolatile memory operations. Metal-insulator-semiconductor(MIS) C-V properties with high dielectric AIN thin films showed no hysteresis and good interface properties. The dielectric constant of the AIN film calculated from the capacitance at the accumulation region in the capacitance-voltage(C-V) characteristics was about 8. The C-V characteristics of MFIS capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 23. The memory window width was about 1.2 V at the gate voltage of $\pm$5 V ranges. Typical gate leakage current density of the MFIS structure was the order of 10$^{-9}$ A/$\textrm{cm}^2$ at the range of within $\pm$500 kV/cm. The ferroelectric capacitors showed no polarization degradation up to about 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulse(peak-to-peak 8 V, 50 % duty cycle) in the 500 kHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.58-61
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• 2001

Metal-insulator-semiconductor (MIS) C-V properties with high dielectric AIN thin films showed no hysteresis and good interface properties. The dielectric constant of the AIN film calculated from the capacitance at the accumulation region in the capacitance-voltage(C-V) characteristics was about 8. The C-V characteristics of MFIS capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 23. The memory window width was about 1.2V at the gate voltage of $\pm$5 V ranges. Typical gate leakage current density of the MFIS structure was the order of 10$^{-9}$ A/cm$^2$ at the range of within $\pm$500 kV/cm. The ferroelectric capacitors showed no polarization degradation up to about 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulse(peak-to-peak 8V, 50% duty cycle) in the 500kHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.973-976
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• 2004

The results of numerous studies in III-V semiconductors show that sulfur treatment improves the electrical parameters of III-V compound devices. In this article, we examine the effects of sulfidation of HgCdTe surface on the interfacial characteristics of metal-ZnS-HgCdTe structures. Different from sulfidation in III-V material, S can not be act as an impurity because II-S compounds (ZnS, CdS) generally used as passivant for HgCdTe. Our studies of sulfur-treatment on HgCdTe surface show that sulfur agent forms the S- S, II-S bonds at the surface layer. These bonds are very effective to improve the electrical properties of ZnS layer on HgCdTe by reducing the possibility of native oxides formation. After the sulfidation process, MIS capacitors of HgCdTe show great improvement in electrical properties, such as low density of fixed charge and reduced hystereisis width.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.6
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• pp.466-468
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• 2009

The metal-insulator-silicon (MIS) capacitors with $SiO_2$ and high-k dielectrics ($HfO_2$, $Al_2O_3$) were fabricated, and the current-voltage characteristics were investigated. Especially, an effective barrier height between metal gate and dielectric was extracted by using Fowler-Nordheim (FN) plot and Direct Tunneling (DT) plot of quantum mechanical(QM) modeling. The calculated barrier heights of thermal $SiO_2$, ALD $SiO_2$, $HfO_2$ and $Al_2O_3$ are 3.35 eV, 0.6 eV, 1.75 eV, and 2.65 eV, respectively. Therefore, the performance of non-volatile memory devices can be improved by using engineered tunnel barrier which is considered effective barrier height of high-k materials.