• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1247-1249
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• 1993

In this paper, NUDFET(NonUniformly Doped Field Effect Transistor) is presented as an alternative which offers the possibility of reducing the power necessary to operate switching circuits without a substantial loss in speed. The purpose of this NUDFET is to modify the electric field profile in order to cause carrier velocity saturation to occur at a lower voltage than it would occur in the uniformly doped device of the same channel length. The more MESFET and NUDFET circuits are realized, the more accurate model ins the performance of these devices become required. Analytic model ins was replaced by numerical analysis because of the complexity of device configuration. In this paper, FEM is selected because of simpler local mesh refinement and smaller computer memory than FDM. For accurate analysis, this paper has applied the Scharfetter-Gummel(S-G) Scheme and seven-point Gaussian Quadrature rule to assembly of the finite-element stiffness matrices and right-hand side vector of the semiconductor equations.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.163-163
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• 1999

MOSFET, MESFET 그리고 MODFET는 Logic ULSIs, high speed ICs, RF MMICs 등에서 중요한 역할을 하고 있으며, 그것의 gate electrode, contact, interconnect 등의 물질로는 refractory metal을 이용한 CoSi2, MoSi2, TaSi2, PtSi2, TiSi2 등의 효과를 얻어내고 있다. 그중 TiSi2는 비저항이 가장 낮고, 열적 안정도가 좋으며 SAG process가 가능하므로 simpler alignment process, higher transconductance, lower source resistance 등의 장점을 동시에 만족시키고 있다. 최근 소자차원이 scale down 됨에 따라 TiSi2의 silicidation 과정에서 C49 TiSi2 phase(high resistivity, thermally unstable phase, larger grain size, base centered orthorhombic structure)의 출현과 그것을 제거하기 위한 노력이 큰 issue로 떠오르고 있다. 여러 연구 결과에 따르면 PAI(Pre-amorphization zimplantation), HTS(High Temperature Sputtering) process, Mo(Molybedenum) implasntation 등이 C49를 bypass시키고 C54 TiSi2 phase(lowest resistivity, thermally stable phase, smaller grain size, face centered orthorhombic structure)로의 transformation temperature를 줄일 수 있는 가장 효과적인 방법으로 제안되고 있지만, 아직 그 문제가 완전히 해결되지 않은 상태이며 C54 nucleation에 대한 physical mechanism을 밝히진 못하고 있다. 본 연구에서는 증착 시 기판온도의 변화(400~75$0^{\circ}C$)에 따라 silicon 위에 DC/RF magnetron sputtering 방식으로 Ti/Si film을 각각 제작하였다. 제작된 시료는 N2 분위기에서 30~120초 동안 500~85$0^{\circ}C$의 온도변화에 따라 RTA법으로 각각 one step annealing 하였다. 또한 Al을 cosputtering함으로써 Al impurity의 존재에 따른 영향을 동시에 고려해 보았다. 제작된 시료의 분석을 위해 phase transformation을 XRD로, microstructure를 TEM으로, surface topography는 SEM으로, surface microroughness는 AFM으로 측정하였으며 sheet resistance는 4-point probe로 측정하였다. 분석된 결과를 보면, 고온에서 제작된 박막에서의 C54 phase transformation temperature가 감소하는 것이 관측되었으며, Al impuritydmlwhswork 낮은온도에서의 C54 TiSi2 형성을 돕는다는 것을 알 수 있었다. 본 연구에서는 결론적으로, 고온에서 증착된 박막으로부터 열적으로 안정된 phase의 낮은 resistivity를 갖는 C54 TiSi2 형성을 보다 낮은 온도에서 one-step RTA를 통해 얻을 수 있다는 결과와 Al impurity가 존재함으로써 얻어지는 thermal budget의 효과, 그리고 그로부터 기대할 수 있는 여러 장점들을 보고하고자 한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.4C
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• pp.371-379
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• 2002

In this paper, the MMIC SPST switches operating from DC to 3GHz were designed and implemented. Prior to the design of switches, the small and large-signal switch models were needed to predict switch performance accurately. The newly proposed small-signal switch model parameters were extracted from measured S-parameters using optimization technique with estimated initial values and boundary limits. In the extraction of large-signal switch model parameters, the current source was modeled by fitting empirical equations to measured DC data and the charge model was derived from extracted channel capacitances from measured S-parameters varying the drain-source voltage. To design basic series-shunt SPST switches and isolation-improved SPST switches, we applied this model to commercial microwave circuit simulator. The improved SPST switches exhibited 0.302dB insertion loss, 35.762dB isolation, 1.249 input VSWR, 1.254 output VSWR, and about 15.7dBm PldB with 0/-3V control voltages at 3GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.6
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• pp.247-252
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• 2003

In this paper, we have designed and fabricated a broadband 2-stage MMIC amplifier. Broadband characteristics could be obtained by compensated matching networks in a 2-stage amplifier design. This method is compensating low gains at lower frequencies in the 1st-stage with higher gains at lower frequencies in the 2nd- stage and then finally flat gains are obtained in the wide frequency ranges. Also, we have obtained not only broadband characteristics but also high gain using compensation matching network. The fabricated amplifier is measured by attaching on the test PCB(Printed Circuits Board). The measurement results are bandwidth of 1.1~2.8 GHz, S$_{21}$ gain of 11.1$\pm$0.3 ㏈ and P1㏈ of 12.6 ㏈m at 2.4 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.3
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• pp.401-408
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• 2001

This paper shows the design, fabrication and performance analysis of VCO which plays a major role in 5.8 GHz RF module for ITS. The design specifications of the VCO are determined on the basis of 5.8 GHz RF modul performance requirements. The design parameters are optimized through ADS simulation tool. The operating characteristic and performance analysis of the implemented VCO based on the design parameters are accomplished. The frequency variations according to the voltage change(0 ~5 V) of varactor diode are from 5.42 GHz to 5.518 GHz and the power level is 6.5 dBm. The second harmonic suppression are -21.5 dBc at 5.51 GHz and the phase noise characteristics are -83.81 dBc at 10 kHz offset frequency. The implemented VCO is available to not only DSRC and also, 5.8 GHz other systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4A
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• pp.458-465
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• 2004

To reaffirm the use of a mainstream CMOS process for designing passive-like attenuator structures, a linearly controlled variable attenuator is realized with 0.35${\mu}{\textrm}{m}$ 2-poly 4-metal CMOS process. It uses the П configuration for large attenuation range and suitable matching property. Compared to conventional passive-like CMOS attenuators, it is demonstrated that this work advances the frequency band from MHz to ㎓ (DC- l㎓), and reduces the size to 700${\mu}{\textrm}{m}$${\times}$300${\mu}{\textrm}{m}$.. Both simulation results and test results are provided. They show the improved linear relation between attenuation and control voltage. It is very useful in CDMA or GSM band, which uses under 1㎓ frequency band. An alternative topology, Bridged-T configuration, is proposed to get over the limit of applications by elevating operation bandwidth. The proposed topology covers over DC-2㎓ frequency band, which means that the proposed architecture can cover the tripleband (800MHz CDMA/GSM, 1.5㎓ GPS, 1.9㎓z PCS system) in applications as well. The simulation results are provided.