• Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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• v.28 no.6
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• pp.573-578
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• 2010

Precise determination of satellite positions is necessary to improve positioning accuracy in GNSS. In this study, GLONASS orbits were predicted from broadcast ephemeris using the 4th-order Runge-Kutta numerical integration method and their accuracy dependence on the integration step and the integration time was analyzed. The 3D RMS (Root Mean Square) differences between the results from I-second integration step and 300-second integration step was about 3 cm, but the processing time was one hundred times less for the I-second integration time case. For trials of different integration times, the 3D RMS errors were 8.3 m, 187.3 m, and 661.5 m for 30-, 150-, and 300-minutes of integration time, respectively. Though this integration-time analysis, we concluded that the accuracy gets higher with a shorter integration time. Thus we suggest forward and backward integration methods to improve GLONASS positioning accuracy, and with this method we can achieve a 5-meter level of 3-D orbit accuracy.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.4
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• pp.602-610
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• 1993

The DDA of new active element and the DDA differential integrator are designed. The DDA can be improved matching problems of external elements in op-amp application circuits. The design of DDA is used the transconductance element, differential pair and $2{\mu}m$ design rule. In order to evaluate the performance of the CMOS DDA, we simulated the DDA voltage inverter and the DDA level shifter using the designed CMOS DDA. Furthermore, the grounded resistor and the differential integrator is designed using the CMOS DDA and we found that its characteristics are agreed to OP-AMP differential integrator's. We performed the layout of the CMOS DDA and DDA differential integrator with MOSIS $2{\mu}m$ CMOS technology.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.6
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• pp.891-896
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• 2002

In this paper, a new voltage-controlled tunable integrator for low-voltage applications is proposed. The proposed active element is composed of the CMOS complementary cascode circuit which can extend transconductance of an element. Therefore, the unity gain frequency which is determined transcon-ductance is increased than that of the conventional element. And then these results are verified by the $0.25{\mu}m$ CMOS n-well parameter HSPICE simulation. As a result, the gain and the unity gain frequency are 42dB and 200MHz respectively in the element on 2V supply voltage. And power dissipation of the designed circuit is 0.32mW.

• Proceedings of the KIEE Conference
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• 2000.07e
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• pp.149-151
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• 2000

본 논문에서는 완전균형 상보형 적분기에서 그 이득과 단위이득 주파수 특성을 향상시킬 수 있는 high-swing cascode 구조를 이용한 새로운 적분기를 설계하였다. 설계된 high-swing cascode 적분기는 $0.25{\mu}m$ n-well CMOS 공정 파라미터를 이용하여 HSPICE 시뮬레이션 하였으면, 그 결과 제안된 회로는 2V 공급전압에서 전력소모는 1.04mW이고 차단주파수는 100MHz를 갖으며 이득은 51dB로서 이 적분기를 이용한 능동필터 설계시 요구조건인 40dB 이상의 이득 값을 만족한다.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.4 s.316
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• pp.61-66
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• 2007

PID control is windely used to control stable processes, however, its application to integrating processes is less common. In this paper we proposed a simple PID controller tuning method for integrating processes with time delay to meet a stable specification. With the proposed PID tuning method, we can obtain stable integrating processes using PD controller in inner feedback loop and a loop transfer function with desired stable specification. This guarantees bout robustness and performance. Simulation examples are given to show the good performance of the proposed tuning method to other methods.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.4
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• pp.1068-1076
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• 1996

In this paper, a new continuous-time current-mode integrator as basic building block of the low-voltage analyog current-mode active filters is proposed. Compared to the current-mode integrator which is proposed by Zele, the proposed current-mode integrator had higher unity gain frequency and output impedance in addition to lower power dissipation. And also, a current-mode third-order lowpass active filter is designed with the proposed current-mode integrator. The designed circuits are fabricated using the ORBIT's $1.2{\mu}{\textrm{m}}$ deouble-poly double-metal CMOS n-well process. The experimental results show that the filter has -3dB cutoff frequency at 44.5MHz and 3mW power dissipation with single 3.3V power supply and also $0.12mm^{2}$ chip area.

• Journal of the Korea Convergence Society
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• v.6 no.5
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• pp.9-14
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• 2015

In this paper, we analysis the electromagnetic scattering of an arbitrary shape dielectric cube subjected to plane wave incidence in three dimensions. MoM(Method of Moments)in which a surface of a body is divided with small triangular patches and equivalence principle are used to fuse the PMCHW(Poggio, Miller, Chang, Harrington, and Wu) Integral Equations with respect to equivalent currents on a dielectric body. Triangular patch and loop-patch basis functions that is robust in wide frequency ranges are used for MoM formulations. Proposed method is very useful to analysis the induced current of arbitrary dielectric bodies and numerical results for a dielectric cube are presented.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.6
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• pp.39-47
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• 1998

A fourth-order $\Sigma$-$\Delta$ modulator is designed and implemented in 0.6 $\mu\textrm{m}$ CMOS technology. The modulator is verified by introducing nonlinear factors such as DC gain and slew rate in system model that determines the transfer function in S-domain and in time-domain. Dynamic range is more than 110 dB and the peak SM is 102.6 dB at a clock rate of 2.8224 MHz for voiceband signal. The structure of a ∑-$\Delta$ modulator is a modified fourth-order ∑-$\Delta$ modulator using direct feedback loop method, which improves performance and consumes less power. The transmission zero for noise is located in the first-second integrator loop, which reduces entire size of capacitors, reduces the active area of the chip, improves the performance, and reduces power dissipation. The system is stable because the output variation with respect to unit time is small compared with that of the third integrator. It is easy to implement because the size of the capacitor in the first integrator, and the size of the third integrator is small because we use the noise reduction technique. This paper represents a new design method by modeling that conceptually decides transfer function in S-domain and in Z-domain, determines the cutoff frequency of signal, maximizes signal power in each integrator, and decides optimal transmission-zero frequency for noise. The active area of the prototype chip is 5.25$\textrm{mm}^2$, and it dissipates 10 mW of power from a 5V supply.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.39 no.9
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• pp.851-857
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• 2015

In this paper, we estimate the time-dependent C(t) integrals under elastic-plastic-creep conditions. Finite-element (FE) transient creep analyses have been performed for single-edge-notched-bend (SEB) specimens. We investigate the effect of the initial plasticity on the transient creep by systematically varying the magnitude of the initial step load. We consider both the same stress exponent and different stress exponents in the power-law creep and plasticity to elastic-plastic-creep behavior. To estimate the C(t) integrals, we compare the FE analysis results with those obtained using formulas. In this paper, we propose a modified equation to predict the C(t) integrals for the case of creep exponents that are different from the plastic exponent.

• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.36 no.3
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• pp.195-201
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• 2000

This paper discusses methods for the stable bottom detection and the optimum bottom offset which enable to separate the fish echoes from the bottom echoes with echo integration of demersal fish. In preprocessing of the echo signal, the bottom detection has to be done stably against the fluctuation of echo level and the bottom offset has to be set to a minimum height such that near bottom fish echoes are included Two methods of bottom detection, namely echo level threshold method and maximum echo slope method were compared and analyzed. The echo level method works well if the ideal threshold level was given but it sometimes misses the bottom because of the fluctuation of the echo. Another method to detect the bottom which uses maximum echo slope indicates the simple and stable bottom detection. In addition, the bottom offset has to be set near to the bottom but not to include the bottom echo. Optimum bottom offset should be set a few samples before the detected bottom echo which relates the beginning of pulse shape and acoustic beam pattern to the bottom feature.