• 비파괴검사학회지
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• 제26권4호
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• pp.231-238
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• 2006

위상 배열 초음파 기법을 이용한 국내 표준형 윈전 저압 터빈의 디스크 검사에 대하여 연구하였다. 이를 위하여 디스크 mockup을 제작하고 결함을 가공하였으며 결함에 대한 검출과 길이 측정 방법에 따른 결과를 고찰하였다. 깊이 측정에서 릴은 결함은 AATT(absolute arrival time technique)방법 혹은 RATT (relative arrival time technique)방법을 사용하여 깊이를 측정할 수 있었으나, 조기에 발견하여야 할 깊이가 깊지 않은 결함은 이와 같은 방법으로 깊이를 측정할 수 없었다. 이 경우 결함 신호가 나타나는 각도 범위를 이용하여 결함 깊이를 측정하였으며 유용한 도구임을 확인하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권4호
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• pp.443-450
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• 2016

The linearization technique for low noise amplifier (LNA) has been implemented in standard $0.18-{\mu}m$ BiCMOS process. The MOS-BJT derivative superposition (MBDS) technique exploits a parallel LC tank in the emitter of bipolar transistor to reduce the second-order non-linear coefficient ($g_{m2}$) which limits the enhancement of linearity performance. Two feedback capacitances are used in parallel with the base-collector and gate-drain capacitances to adjust the phase of third-order non-linear coefficients of bipolar and MOS transistors to improve the linearity characteristics. The MBDS technique is also employed cascode configuration to further reduce the second-order nonlinear coefficient. The proposed LNA exhibits gain of 9.3 dB and noise figure (NF) of 2.3 dB at 2 GHz. The excellent IIP3 of 20 dBm and low-power power consumption of 5.14 mW at the power supply of 1 V are achieved. The input return loss ($S_{11}$) and output return loss ($S_{22}$) are kept below - 10 dB and -15 dB, respectively. The reverse isolation ($S_{12}$) is better than -50 dB.

• Journal of Electrical Engineering and Technology
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• 제13권6호
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• pp.2479-2484
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• 2018

The filter bank multicarrier modulation (FBMC) technique is one of multicarrier modulation technique (MCM), which is mainly used to improve channel capacity of cognitive radio (CR) network and frequency spectrum access technique. The existing FBMC System contains serial to parallel converter, normal QAM modulation, Radix2 inverse FFT, parallel to serial converter and poly phase filter. It needs high area, delay and power consumption. To further reduce the area, delay and power of FBMC structure, a new clock gating technique is applied in the QAM modulation, radix2 multipath delay commutator (R2MDC) based inverse FFT and unified addition and subtraction (UAS) based FIR filter with parallel asynchronous self time adder (PASTA). The clock gating technique is mainly used to reduce the unwanted clock switching activity. The clock gating is nothing but clock signal of flip-flops is controlled by gate (i.e.) AND gate. Hence speed is high and power consumption is low. The comparison between existing QAM and proposed QAM with clock gating technique is carried out to analyze the results. Conversely, the proposed inverse R2MDC FFT with clock gating technique is compared with the existing radix2 inverse FFT. Also the comparison between existing poly phase filter and proposed UAS based FIR filter with PASTA adder is carried out to analyze the performance, area and power consumption individually. The proposed FBMC with clock gating technique offers low power and high speed than the existing FBMC structures.

• 동력기계공학회지
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• 제5권1호
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• pp.44-49
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• 2001

Low temperature vacuum drying technique shows very excellent energy efficiency and prominent drying performances compared with the conventional hot air drying technique. This study was focused on the thermal characteristics of the low temperature vacuum drying technique. From the results of this study, it was confirmed that the time consumption for drying with the new drying technique could be shortened to about 1/3 of the time consumption with the conventional hot air drying technique under the same drying conditions for wet products. Also, the maximum drying rate with the new drying technique reached to about $0.35kg/m^2h$ at about 400% of moisture content.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 전력전자학술대회 논문집
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• pp.438-443
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• 1998

A simple single-stage AC/DC forward converter with transformer magnetic energy feedback technique for power factor correction is proposed. The operational principle of the proposed converter is presented. The proposed converter gives the good power factor correction, low line current harmonic distortions, and tight output voltage regulation. The prototype shows high power factor with low line current harmonics.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 학술대회 논문집 정보 및 제어부문
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• pp.231-233
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• 2005

For the low-power design of the mobile multimedia system architecture, this paper modeling the mobile multimedia system and analysis the power consumption profile about the whole communication environment. The mobile system model consist of air interface, RIP front-end, base-band processing module and human interface. For the result of power consumption profile analysis, the power consumption of multimedia processing is above 60% compare to the whole power consumption in mobile multimedia system. To minimize the power consumption in processing module which consumes the large power, this paper proposed the Microscopic DVS technique which applies the optimum voltage for the each multimedia frame. For the simulation result, proposed power minimization technique reduce the power consumption about 30%.

• ETRI Journal
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• 제33권6호
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• pp.973-976
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• 2011

This letter describes an efficient technique for maximum power point tracking (MPPT) of an energy harvesting device. It is based on controlling the device voltage at the point of maximum power. Using a microcontroller with a power saving technique, the MPPT algorithm maintains the maximum power with low power consumption. An experiment shows that the algorithm maximizes the energy transfer power using an energy management IC fabricated in a 0.18-${\mu}m$ process. Compared to direct energy transfer to a battery, the proposed technique is more efficient for low-energy harvesting under variable conditions.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.501-502
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• 2006

In this paper low power high gain amplifier is suitable for application in low power systems was designed and fabricated. The amplifier used both subthreshold bias for low power and positive feedback Q-enhancement technique for high gain. The amplifier used TSCM $0.18{\mu}m$ RF CMOS technology measures a power gain of 32.3dB, a quality factor of 366 and a power consumption of 3mW in a supply voltage of 1.8V.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.528-532
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• 2004

Novel single-stage power factor correction AC/DC converter with low DC link voltage using new magnetic feedback technique is proposed in this paper. The Proposed converter has high power factor, tight output voltage regulation and low link capacitor voltage less than 450V for all the load range through the universal input line. This converter has also no dead-zone in the input current, which is seen in the conventional converter using the previous magnetic feedback technique. In this paper, the analysis of operations and features of the proposed converter is provided, and the experimental results of 90W-prototype shows the low harmonic distortions satisfied with EN 61000-3-2 Class D, high power factor and low link voltage less than 450V.

• 한국위성정보통신학회논문지
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• 제8권3호
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• pp.10-14
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• 2013

본 논문에서는 저전력 기술인 DVFS (Dynamic Voltage Frequency Scaling) 응용을 위하여, 동작주파수의 변화에도 소비전력이 일정한 특성을 갖는 전류모드 회로를 적용함에 있어서, 저속 동작에서 소비전력이 과다한 전류모드 회로의 문제점을 전류모드 회로에서 sub-threshold 영역 동작의 MOSFET을 적용함으로써 소비전력을 최소화하는 설계기술을 소개한다. 회로설계는 MOSFET BSIM 3모델을 사용하였으며, 시뮬레이션한 결과, strong-inversion 동작일 때 소비전력은 $900{\mu}W$이었으나, sub-threshold 영역으로 동작하였을 때, 소비전력이 $18.98{\mu}W$가 되어, 98 %의 소비전력의 절감효과가 있음을 확인하였다.