• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.8 no.8
• /
• pp.1705-1712
• /
• 2004

This paper presents a new low-cost RF Built-In Self-Test (BIST) circuit for measuring transducer voltage gain, noise figure and input impedance of 5.25GHz low noise amplifier (LNA). The BIST circuit is designed using 0.18${\mu}{\textrm}{m}$ SiGe technology. The test technique utilizes input impedance matching and output transient voltage measurements. The technique is simple and inexpensive. Total chip size has additional area of about 18% for BIST circuit.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2004.05b
• /
• pp.635-641
• /
• 2004

This paper presents a new low-cost RF Built-In Self-Test (BIST) circuit for measuring transducer voltage gain, noise figure and input impedance of 5.25GHa low noise amplifier (LNA). The BIST circuit is designed using 0.18${\mu}{\textrm}{m}$ SiGe technology. The test technique utilizes input impedance matching and output transient voltage measurements. The technique is simple and inexpensive. Total chip size has additional area of about 18% for BIST circuit.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.2
• /
• pp.100-105
• /
• 2010

In this paper, a FM radio receiver integrated circuit has been developed based on $0.5{\mu}m$ CMOS process for Zero-Crossing FM demodulator over the 88MHz to 108MHz band. The receiver is designed with the low-IF architecture, and includes Low Noise Amplifier(LNA), Down-Conversion Mixer, Phase Locked Loop(PLL), IF LPF, and a comparator. The measured results of the LNA and Mixer show that the conversion gain of 23.2 dB, the input PldB of -14 dBm, and the noise figure of 15 dB. The measured analog block of the LPF and comparator show the voltage gain of over 89 dB, and the IF LPF can configure the passband from 600KHz to 1.3MHz with 100KHz step through the internal control register banks. The designed FM radio receiver operates at 4.5V with the total current consumption of 15.3mA, so the total power consumption is about 68.85mW. The commercial FM radio has been successfully received.

• Proceedings of the IEEK Conference
• /
• 2000.11a
• /
• pp.333-336
• /
• 2000

This paper describes a CMOS low noise amplifier (LNA) with bias current reusing architecture intended lot use in the front-end of IMT-2000 receiver. It has been implemented in a 0.35$\mu\textrm{m}$ CMOS process with two poly and four metal layers. In order to accuracy of simulation, we considered a bonding wire and a pad effect and used the measurements of capacitors and on-chip inductors which implemented in the same process. The LNA has a forward gain (S21) of 17 ㏈ and a noise fjgure of 1.26 ㏈. And it has a third-order intermodulation intercept point (IP3) of +3.15 ㏈m and a 1㏈ compression point (P1㏈) of -16 ㏈m, input referred, respectively. The power consumption is 19 ㎽ from a 3V supply.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
• /
• v.9 no.4
• /
• pp.153-157
• /
• 2010

In this paper, a dual band LNA (Low Noise Amplifier) with a LC-tank matching circuit is designed for 912MHz and 2.45GHz RFID reader. The operating frequency is decided by the LC-tank resonance. The simulated results demonstrate that S21 parameter is 11.683dB and 5.748dB at 912MHz and 2.45GHz, respectively, and the S11 are -10.796dB and -21.261dB, the S22 are -7.131dB and -14.877dB at the same frequencies. The measured NF (Noise Figure) is 0.471 and 1.726 at 912MHz and 2.45GHz, respectively.

• Proceedings of the IEEK Conference
• /
• 2000.06e
• /
• pp.191-194
• /
• 2000

A 2.4 GHz single ended two stage low noise amplifier(LNA) is designed for Bluetooth application. The circuit was implemented in a standard digital 0.25 $\mu\textrm{m}$ CMOS process with one poly and five metal layers. At 2.4 GHz, the LNA dissipates 34.5 mW from a 2.5V power supply voltage and provides 24.6 dB power gain, 2.85 dB minimum noise figure, -66.3 dB reverse isolation, and an output 1-dB compression level of 8.5 dBm.

• Proceedings of the KIEE Conference
• /
• 1995.11a
• /
• pp.487-488
• /
• 1995

Broadband Microwave Low Noise Amplifier(LNA) is designed. The matching method using the broadband BPF(BandPass Filter) is introduced in this paper. This method is that the filter having the same reflection coefficient of Microwave GaAs FET in the desired bandwidth is located on the input stage of FET. The Simulated results is obtained that the $S_{21}$ and noise figure in 2.5GHz$\sim$9GHz, band are 8.5dB $\pm$ 1.5dB, 2.5dB $\pm$ 0.3dB respectively.

• Proceedings of the IEEK Conference
• /
• 2002.07b
• /
• pp.1137-1140
• /
• 2002

A V-band low-noise amplifiers (LNA) based on the Millimeter-wave monolithic integrated circuit (MIMIC) technology were fabricated using high performance 0.1 $\mu\textrm{m}$ $\Gamma$-shaped pseudomorphic high electron mobility transistors (PHEMT＇s), coplanar waveguide (CPW) structures and the integrated process for passive and active devices. The low-noise designs resulted in a two-stage MIMIC LNA with a high S$\sub$21/ gain of 14.9 dB and a good matching at 60 ㎓. 20 dBm of IP3 and 3.9 dB of minimum noise figure were also obtained from the LNA. The 2-stage LNA was designed in a chip size of 2.3 ${\times}$1.4 mm$^2$by using 70 $\mu\textrm{m}$ ${\times}$2 PHEMT’s. These results demonstrate that a good low-noise performance and simultaneously with a high gain performance is achievable with GaAs PHEMT's in the 60 ㎓ band.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.14 no.1
• /
• pp.100-108
• /
• 2014

Low noise amplifier (LNA) is an integral component of RF receiver and frequently required to operate at wide frequency bands for various wireless system applications. For wideband operation, important performance metrics such as voltage gain, return loss, noise figure and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high impedance-matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that input impedance can be described in the form of second-order frequency response, where poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor located between the gate and the drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this wideband LNA is $0.202mm^2$, including pads. Measurement results illustrate that the input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 6-8 dB over 1.5 - 13 GHz. In addition, good linearity (IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.47 no.5
• /
• pp.388-396
• /
• 2019

This paper describes the RF(Radio Frequency) interference on the GNSS receiver due to the S-band signals transmitted from the transmitters in the Test Launch Vehicle, and analyzes the cause of the RF interference. Due to the S-band signals that have relatively high power levels compared with GNSS signals, an LNA(Low Noise Amplifier) in the active GNSS antenna was saturated, and the intermodulation signal within GNSS in-bands was produced in the LNA whenever two S-band signals were received from the GNSS antenna. For these reasons, the C/N0 of the satellite signals in the GNSS receiver was attenuated severely. The design of the LNA was changed in order to protect the RF interference due to the S-band signals and the suppression capability of the RF interference was confirmed in the new LNA through the comparison of the old LNA.