• Journal of Power Electronics
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• 제18권4호
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• pp.965-974
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• 2018

A new zero-voltage-switching (ZVS) push-pull pulse-width modulation (PWM) converter is proposed in this paper. The wide ZVS condition for all of the switches is obtained by utilizing the energy stored in the output inductor and magnetizing inductance. As a result, the switching losses can be dramatically reduced. A simple auxiliary circuit including two small diodes and one capacitor is added at the secondary side of a high frequency (HF) transformer to reset the primary current during the circulating stage and to clamp the voltage spike across the rectifier diodes, which enables the use of low-voltage and low-cost diodes to reduce the conducting and reverse recovery losses. In addition, there are no active devices or resistors in the auxiliary circuit, which can be realized easily. A detailed steady operation analysis, characteristics, design considerations, experimental results and a loss breakdown are presented for the proposed converter. A 500 W prototype has been constructed to verify the effectiveness of the proposed concept.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 F
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• pp.2653-2655
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• 1999

A technique to suppress the low frequency ripple voltage of the DC output voltage in three-phase buck diode rectifiers is presented. A pulse frequency modulation method is employed to regulate the output voltage of the rectifier and guarantee zero-current switching of the switch over the wide operating range. The pulse frequency control method used in this paper shows generally good performance such as low THD of the input line current and unity power factor. In addition, the pulse frequency method can be effectively used to suppress the low frequency voltage ripple appeared in the dc output voltage. The proposed technique illustrates its validity and effectiveness through the respective simulations and experiments.

• 대한전자공학회논문지SD
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• 제40권6호
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• pp.421-430
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• 2003

본 논문에서는 MCU에 내장된 EPROM의 저 전압 동작을 위한 새로운 회로구조를 제안하였다. MCU에 내장된 EPROM은 일반적으로 마스크 롬에 비해 저 전압 특성이 떨어지며, 배터리를 사용하여 전원전압이 시간이 경과할수록 감소하는 응용분야에서는 마스크 롬을 내장한 MCU와 대체가 되지 않는 문제가 발생한다. 본 논문에서는 EPROM의 저 전압 동작을 위해 전원전압이 특정전압이하로 낮아지면 이를 검출하여 EPROM의 워드라인의 전압을 승압시키는 회로와 기준 셀을 사용하지 않고 전류를 감지하는 센스앰프를 제안하여 저 전압 특성이 30%이상 개선된 1.5V에서 동작하는 EPROM 내장 MCU를 설계, 구현, 검증하였다.

• 한국정보과학회논문지:시스템및이론
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• 제29권11호
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• pp.601-610
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• 2002

태스크내부에서 공급 전압을 조절하는 태스크내 전압 스케쥴링(IntraVS)은 저전력 프로그램을 구현하는 데 효과적인 방법이다. 본 논문에서는 경성 실시간 응용프로그램에서 평균 실행 시간에 대한 정보를 이용하여 전력 소모를 효과적으로 줄이는 새로운 태스크내 전압 스케쥴링 알고리즘을 제시한다. 최악 실행 시간을 사용하여 전압 조절의 결정을 내렸던 기존의 태스크내 전압 스케줄링과는 달리, 제안된 알고리즘은 평균 실행 시간에 바탕을 두고 실행 속도를 조절함으로써 주어진 시간 제약 조건을 만족시키면서도 기존 방법보다 에너지 효율성을 높일 수 있다. MPEG-4 디코더를 이용한 실험 결과, 제안된 알고리즘은 기존의 태스크내 전압 스케줄링에 비해서 전력 소모를 최대 34% 감소시켰다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 C
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• pp.1885-1887
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• 2004

This paper presents the aspect and distribution of voltage and current harmonics being made at low voltage power systems. The voltage and current harmonics in power systems supplying various loads were monitored and analyzed. We have examined the results compared to advanced countries' harmonics control standards. As a result, the current harmonics were significantly greater than the voltage harmonics. In particular, the harmonics of currents flowing through loads with power switching electronics was pronounced. Also, the contents of current harmonics of street lamp circuits was about 30%, and it was decreased to 12.3% with the installation of scries reactor. On the whole, The measured results of voltage and current harmonics exceeds the regulation limits recommended by IEEE std 519-1992.

• 전기학회논문지
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• 제67권1호
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• pp.82-86
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• 2018

Low voltage atmospheric plasma generation using DBD Initiation carrier injection is reported. DBD afterglow was used as initiation carriers prior to a primary discharge and a significant reduction in the breakdown voltage of atmospheric discharge was observed when sufficient initiation carriers were provided. Quantative correlation study between the breakdown voltage and the initiation carriers suggests that the atmospheric breakdown voltage reduces to only half of the breakdown voltage for Townsend regime. Also, use of DBD initiation carrier injection likely offers better device reliability by protecting electrodes with a dielectric layer and thus suppressing electrode wear.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.520-522
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• 2008

A novel two-switch active clamp forward converter suitable for high input voltage applications is proposed. The main advantage of the proposed converter, compared to the conventional active forward converters, is that circuit complexity is reduced and the voltage stress of the main switches is effectively clamped to either the input voltage or the clamping capacitor voltage by two clamping diodes without limiting the maximum duty ratio. Also, the clamping circuit does not include additional active switches, so a low cost can be achieved without degrading the efficiency. Therefore, the proposed converter can feature high efficiency and low cost for high input voltage applications. The operational principles, features, and design considerations of the proposed converter are presented in this paper. The validity of this study is confirmed by the experimental results from a prototype with 200W, 375V input, and 12V output.

• 대한전자공학회논문지SD
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• 제40권6호
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• pp.442-446
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• 2003

본 논문에서는 몸체효과와 문턱전압 손실이 제거된 새로운 2-단계 2-위상 VPP 전하펌프 발생기를 제안하였다. 새롭게 제안된 회로의 동작을 검증하기 위하여 0.18um Triple-Well CMOS 공정을 사용하였으며, VPP의 전압 레벨은 VDD가 문턱전압 이상일 때 3VDD가 공급되는 결과를 얻었다.

• Journal of Power Electronics
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• 제16권2호
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• pp.447-454
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• 2016

A single-ended primary-inductor converter (SEPIC) features low input current ripple and output voltage up/down capability. However, the switching devices in a two-level SEPIC suffer from high voltage stresses and switching losses. To cope with this drawback, this study proposes a three-level SEPIC that uses a low voltage-rated switch and thus achieves better switching performance compared with the two-level SEPIC. The three-level SEPIC can reduce switch voltage stresses and switching losses. The converter operation and control method are described in this work. The experimental results for a 500 W prototype converter are also discussed. Experimental results show that unlike the two-level SEPIC, the three-level SEPIC achieves improved power efficiency with balanced capacitor voltages.

• 전력전자학회논문지
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• 제17권1호
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• pp.85-92
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• 2012

In this paper, a 300[W] class boost type single-phase inverter system which can compensate voltage sag on source side is designed and implemented. This system is a two-stage conversion system composed of a boost converter and a PWM inverter. If the voltage sag has appeared at the point of common coupling, the boost converter would be operated to compensate it. The boost converter and the inverter were constructed on single smart power module(SPM) to implement low cost system. The system is designed for that the THD of output voltage is below 5[%]. Finally, the validity of the design for the inverter system is verified by both simulations and experiments.