• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 전력전자학술대회 논문집
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• pp.617-618
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• 2012

Recently as the inactive response characteristics of the existing RCD(Residual Current protective Device) used on low voltage power distribution system, so control of overload and electric short circuit faults, major causes of electrical fires, are not enough. Therefore, this paper is proposed a prevention apparatus using neutral line voltage and semiconductor switching devices for the prevention of electrical disasters in low voltage power distribution system caused by overload or electric short circuit faults. The proposed prevention apparatus confirms the excellent characteristics in response velocity and accuracy in comparison with the conventional circuit breaker(RCD) through various operation performance analysis.

• 전력전자학회논문지
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• 제21권5호
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• pp.453-456
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• 2016

The major causes of electrical fire in low-voltage distribution lines are classified into short-circuit fault, overload fault, electric leakage, and electric contact failure. The special principal factor of the fire is electric arc or spark accompanied with such electric faults. This paper studies the development of an electric fire prevention system with detection and alarm of that in case of parallel arc fault occurrence in low-voltage distribution lines. The proposed system is designed on algorithm sensing the instantaneous voltage drop of line voltage at arc fault occurrence. The proposed detector has characteristics of high-speed operation responsibility and superior system reliability from composition using a large number of semiconductor devices. A new sensing control method that shows the detection of parallel arc fault is sensed to ripple voltage drop through a diode bridge full-wave rectifier at electrical accident occurrence. Some experimental tests of the proposed system also confirm the practicality and validity of the analytical results.

• Journal of Power Electronics
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• 제15권1호
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• pp.86-95
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• 2015

An active clamp high step-up boost converter with a coupled inductor is proposed in this paper. In the proposed strategy, a coupled inductor is adopted to achieve a high voltage gain. The clamp circuit is included to achieve the zero-voltage-switching (ZVS) condition for both the main and clamp switches. A rectifier composed of a capacitor and a diode is added to reduce the voltage stress of the output rectifier diode. As a result, diodes with a low reverse-recovery time and forward voltage-drop can be utilized. Since the voltage stresses of the main and clamp switches are far below the output voltage, low-voltage-rated MOSFETs can be adopted to reduce conduction losses. Moreover, the reverse-recovery losses of the diodes are reduced due to the inherent leakage inductance of the coupled inductor. Therefore, high efficiency can be expected. Firstly, the derivation of the proposed converter is given and the operation analysis is described. Then, a steady-state performance analysis of the proposed converter is analyzed in detail. Finally, a 250 W prototype is built to verify the analysis. The measured maximum efficiency of the prototype is 95%.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 추계학술대회 논문집
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• pp.463-466
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• 2000

According to the development of the semiconductor micro device technology, IC chip trends the high integrated, low power tendency. Nowadays, it can be showed the tendency of single chip in system level. But in the system level, IC operates by multi power supply voltages. So, semiconductor process is necessary for these multi power operation. Therefore, in this paper, dual gate high voltage device that operate by multi power supply of 5V and 20V fabricated in the 0.5${\mu}{\textrm}{m}$ CMOS process technology and its electrical characteristics were analyzed. The result showed that the characteristics of the 5V device almost met with the SPICE simulation, the SPICE parameters are the same as the single 5V device process. And the characteristics of 20V device showed that gate length 3um device was available without degradation. Its current was 520uA/um, 350uA/um for NMOS, PMOS and the breakdown voltages were 25V, 28V.

• 전기학회논문지
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• 제66권4호
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• pp.659-665
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• 2017

Power semiconductor devices required the low on-resistance and high breakdown voltage. Wide band-gap materials opened a new technology of the power devices which promised a thin drift layer at an identical breakdown voltage. The diamond had the wide band-gap of 5.5 eV which induced the low power loss, high breakdown capability, low intrinsic carrier generation, and high operation temperature. We investigated the p-type pseudo-vertical diamond Schottky barrier diodes using a numerical simulation. The impact ionization rate was material to calculating the breakdown voltage. We revised the impact ionization rate of the diamond for adjusting the parallel-plane breakdown field at 10 MV/cm. Effects of the field plate on the breakdown voltage was also analyzed. A conventional diamond Schottky barrier diode without field plate exhibited the high forward current of 0.52 A/mm and low on-resistance of $1.71{\Omega}-mm$ at the forward voltage of 2 V. The simulated breakdown field of the conventional device was 13.3 MV/cm. The breakdown voltage of the conventional device and proposed devices with the $SiO_2$ passivation layer, anode field plate (AFP), and cathode field plate (CFP) was 680, 810, 810, and 1020 V, respectively. The AFP cannot alleviate the concentration of the electric field at the cathode edge. The CFP increased the breakdown voltage with evidences of the electric field and potential. However, we should consider the dielectric breakdown because the ideal breakdown field of the diamond is higher than that of the $SiO_2$, which is widely used as the passivation layer. The real breakdown voltage of the device with CFP decreased from 1020 to 565 V due to the dielectric breakdown.

• Journal of Power Electronics
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• 제15권2호
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• pp.544-554
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• 2015

This paper presents a steady-state operation analysis of full-bridge series-resonant inverters focusing on the distorted load current due to low-quality-factor resonant circuits in induction heating and other applications. The regions of operation based on the zero-voltage switching (ZVS) and non-zero-voltage switching (NON-ZVS) operations of the asymmetrical voltage-cancellation control technique are identified. The effects of a distorted load current under a wide range of output powers are also analyzed for achieving a precise ZVS operating region. An experimental study is performed with a 1kW prototype. Simulation and experimental studies have confirmed the validity of the proposed method. An efficiency comparison between the variable frequency method and the conventional fixed-frequency method is provided.

• 전력전자학회논문지
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• 제18권4호
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• pp.312-321
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• 2013

In this paper, high efficiency control method for flyback inverter with synchronous rectifier(SR) based on photovoltaic AC modules is proposed. In this control method, the operation of SR is classified according to the voltage spike across main switch SP. When the voltage spike across SP is lower than the rating voltage of SP, the operation of active clamp circuit is interrupted for reducing the switching loss of auxiliary switch. In this time, the SR is operated for soft-switching of SP. When the voltage spike across Sp is higher than the rating voltage of SP, the operation of active circuit is activated for reducing the voltage spike. The SR is operated for reducing the conduction loss of secondary output diode. Thus, a switching loss of the main switch can be reduced in low power region, and weighted-efficiency can be improved. A theoretical analysis and the design principle of the proposed method are provided. And validity is confirmed through simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• 제11권6호
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• pp.1656-1663
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• 2016

A capacitive wireless power transfer (C-WPT) system uses an electric field to transmit power through a physical isolation barrier which forms a pair of ac link capacitors between the metal plates. However, the physical dimension and low dielectric constant of the interface medium severely limit the effective link capacitance to a level comparable to the main switch output capacitance of the transmitting circuit, which thus narrows the soft-switching range in the light load condition. Moreover, by fundamental limit analysis, it can be proved that such a low link capacitance increases operating frequency and capacitor voltage stress in the full load condition. In order to handle these problems, this paper investigates optimal design of double matching transformer networks for C-WPT. Using mathematical analysis with fundamental harmonic approximation, a design guideline is presented to avoid unnecessarily high frequency operation, to suppress the voltage stress on the link capacitors, and to achieve wide ZVS range even with low link capacitance. Simulation and hardware implementation are performed on a 5-W prototype system equipped with a 256-pF link capacitance and a 200-pF switch output capacitance. Results show that the proposed scheme ensures zero-voltage-switching from full load to 10% load, and the switching frequency and the link capacitor voltage stress are kept below 250 kHz and 452 V, respectively, in the full load condition.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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• pp.341-345
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• 2004

A high efficiency and low device stress voltage and current clamping BVS PWM asymmetrical half bridge converter is proposed in this paper. To achieve the ZVS of power switches along the wide load range, the transformer leakage inductor $L_{Ikg}$ is increased. Then, to solve the problem related to ringing in the secondary rectifier caused by the resonance between $L_{Ikg}$ and rectifier junction capacitors, the proposed converter employs a voltage and current clamping cell, which helps voltages and currents of rectifier diodes to be clamped at the output voltage and output current, respectively. Therefore, no RC-snubber for rectifier diodes is needed and a high efficiency as well as low noise output voltage can be realized. In addition, since all energy stored in $L_{Ikg}$ is transferred to the output side, the circulating energy problem can be effectively solved and duty loss does net exist. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385-170Vdc prototype are presented.

• 전기학회논문지
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• 제65권6호
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• pp.1007-1012
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• 2016

Induction motors are used widely in driving load of a fluid, such as a pump or a fan in the industry. Induction motor has been generated the voltage drop by the occurrence of a high current during startup. In addition, high start-up current can act as a mechanical stress on the shaft of the motor. So there is need a way to reduce the starting current. Soft start method is one of the many ways to reduce the starting current. This method uses silicon-controlled rectifiers(SCRs) for varying value of the voltage applied to the motor. There is a case for fixing or changing the thyristor firing angle to adjust the magnitude of the voltage. Starting power factor of induction motor is very low compared to the normal operation. Soft starting with the firing angle fixed needs to be considered a low power factor at startup. In this study, we compared the direct start characteristics and soft start characteristics considering the low power factor at the time of start-up. It was possible to confirm that the starting current and the voltage drop is present differently according to the firing angle.