• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.647-653
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• 2005

According to the design concept of microwave front-end, a low noise amplifier block using HBT cascode topology is proposed to provide high gain and low noise figure with low bias current. We has implemented MMIC-LNA with a modified configuration using inductors to show low noise at the emitter and base of cascoded HBT-MMIC amplifier. The measured performance of the designed MMIC-LNA at 3.7GHz are a gain of 19dB, noise figure of 2.7dB and image rejection of 35dBc using a supply of 3mA and 2.7V. We can convinced that cascoded amplifier block to fulfill a high gain, low noise and image rejection if microwave front-end receiver is designed by cascode MMEC-LNA with the active image rejection filter.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.309-312
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• 2002

In this paper, we discuss the design of high gain low noise amplifier by using the 0.2sum CMOS technology. A cascode inverter is adopted to implement the low noise amplifier. The proposed cascode inverter LNA is one stage amplifier with a voltage reference and without choke inductors. The designed 2.4GHz LNA achieves a power gain of 25dB, a noise figure of 2.2dB, and power consumption of 255㎽ at 2.5V power supply.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.842-844
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• 2012

This paper introduces a 5GHz FIR filter low noise amplifier (LNA) based on a distributed amplifier and analyzes the its characteristics. The proposed FIR filter-LNA has the MA(moving average) filter characteristic which improves the frequency selectivity of the amplifier. Proto-type circuits with FR4 and ${\varepsilon}_r=10.2$ PCB have been realized and simulated using ADS (Advanced Design System). The simulation results verified that the designed LNA had a gain of about 10dB and the frequency characteristic of the MA FIR filter. It is expected that the proposed FIR filter LNA can be applicable to the various applications using an amplifier and a filter in RF systems.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.1004-1007
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• 2005

This paper presents a programmable RF BIST (Built-in Self-Test) circuit for low noise amplifiers. We have developed a new on-chip RF BIST circuit that measures RF parameters of low noise amplifier (LNA) using only DC measurements. The BIST circuit contains test amplifier with programmable capacitor banks and RF peak detectors. The test circuit utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance and gain using the mathematical equations. Our on-chip BIST can be self programmed for 1.8GHz, 2.4GHz and 5.25GHz LNA for GSM, Bluetooth and IEEE802.11g standards.

• Journal of Applied Reliability
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• v.11 no.3
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• pp.251-265
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• 2011

Low-noise amplifier(LNA) is a component that amplifies the signal while lowering the noise figure of high-frequency signal. LNA holds a very important position in RF system so that it is widely used for telecommunication. Electro static discharge(ESD) is the most common cause of malfunction for low-powered components, such as Large Scale Integration and IC type LNA is weak in ESD. This thesis studies static effect of communication LNA. It analyzes ESD effect, which occurs within LNA circuit, and describes testing standard and methods. In order to find out LNA's susceptiblity to electro static, two well-recognized communication IC type LNA models were selected to be tested. Then static-induced malfunction was carefully analyzed and it suggests architectural problem and improvement from the LNA's ESD point of view.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.10
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• pp.2045-2051
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• 2009

A 5-GHz band Low Noise Amplifier(LNA) using SOI MOSFET is designed. To improve the noise performance, depletion-type SOI MOSFET is adopted, and it is designed by the two-stage topology consisting of common-source and common-gate stages for low-voltage operation. The fabricated LNA achieved an S11 of less than -10dB, voltage gain of 21dB with a power consumption of 8.3mW at 5.5GHz, and a noise figure of 1.7dB indicated that the depletion-type LNA improved the noise figure by 0.3dB compared with conventional type. These results show the feasibility of a CMOS LNA employing depletion-type SOI MOSFET for low-noise application.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.5
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• pp.678-681
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• 2020

In this paper, we analyzed the noise figure of cascode low noise amplifier (LNA) based on the measured data of 65nm CMOS devices. By using the channel thermal noise model of transistors, we expanded noise figure equation and divided the equation into three parts to see its contributions to noise figure. We also varied design parameters such as bias point, transistor gate width, and operating frequency. Our results show that different noise sources dominate at the different operating frequencies. One can easily find the noise transition frequency with device models in ahead of the practical design. Therefore, this research provides a low noise design approach for different operating frequencies.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.4
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• pp.28-39
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• 2007

This paper presents a programmable RF DFT (Radio Frequency Design-for-Testability) circuit for low noise amplifiers. We have developed a new on-chip RF DFT circuit that measures RF parameters of low noise amplifier (LNA) using only DC measurements [1, 2]. This circuit is extremely useful for today's RFIC devices in a complete RF transceiver environment. The DFT circuit contains test amplifier with programmable capacitor banks and RF peak detectors. The test circuit utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance and gain using the mathematical equations. Our on-chip DFT circuit can be self programmed for 1.8GHz, 2.4GHz and 5.25GHz low noise amplifiers for GSM, Bluetooth and IEEE802.11g standards. The circuit is simple and inexpensive.

• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.225-228
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• 2004

This paper has been studied about UWB(Ulra wide-band)'s LNA(Low Noise Amplifier) and Mixer. The UWB is a new technology that is being pursed for both commercial and military purposes. Direct conversion architectures that convert RF signals have potential to achieve such terminals, because they eliminate the need for non-programmable image-rejection filters and IF channel filters. And this architecture promises better performance in power, size, and cost than existing heterodyne - based receivers. This Receiver architectures combines low-noise amplifier, mixer. And then this paper has designed suitable UWB's LNA and Mixer.

• Journal of Advanced Marine Engineering and Technology
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• v.32 no.8
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• pp.1263-1268
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• 2008

In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.