• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.61 no.3
• /
• pp.149-152
• /
• 2012

In this paper, a wideband monopole antenna with ring loop by modified ground plane is presented. The proposed antenna consist of monopole antenna, ring loop by ground plane. This antenna is fed CPW-fed and wide slot antenna of a novel structure for broadband characteristics is proposed. To enhance the impedance bandwidth of the wide slot antenna, we proposed the wide slot structure with CPW-fed which is combined with four ${\lambda}/2$ rectangular radiation modified monopole and inductively coupled. The measured impedance bandwidth is about 2.5 GHz(3.65~6.15 GHz) then less -10 dB.

• The Transactions of the Korean Institute of Electrical Engineers D
• /
• v.49 no.5
• /
• pp.278-286
• /
• 2000

A new large-scale network geometric analysis is introduced. For a large-scale circuit, it must be analyzed with a geometric diagram and figure. So many equations are induced from a geometric loop-node diagram. The results are arranged into a simple matrix, of course. In case of constructing a network diagram, it is not easy to handle voltage and current sources together. Geometric loop analysis is related to voltage sources, and node analysis is to current sources. The reciprocal transfer is possible only to have series or parallel impedance. If not having this impedance, in order to obtain equivalent circuit, many equations must be derived. In this paper a loop-reduction method is proposed. With this method current source branch is included into the other branch, and disappears in circuit diagram. So the number of independent circuit equations are reduced as much as that of current sources. The number is not (b-n+1), but (b-n+1-p). Where p is the number of current sources. The reduction procedure is verified with a geometric principle and circuit theory. A resultant matrix can be constructed directly from this diagram structure, not deriving circuit equations. We will obtain the last results with the help of a computer.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2017.10a
• /
• pp.55-56
• /
• 2017

In this paper, a wideband loop antenna is designed using a CPW feeding method for indoor digital TV applications. The proposed loop antenna consists of a square loop and two circular sectors which connect the loop with central feed points, and the CPW feed line is inserted in the lower circular sector. The CPW feed line is designed to match with the 75 ohm port impedance for DTV applications, and the ground slots are etched in order to improve the impedance matching in the middle frequency region. The optimized antenna is fabricated on FR4 substrate, and the experiment results show that it operates in the frequency band of 463-1,280 MHz for a VSWR < 2, which assures the operation in the DTV band.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2003.06a
• /
• pp.325-329
• /
• 2003

In this paper. the stability and performance analysis of wave-based teleoperation system is presented. For stability and performance analysis with respect to the variation of characteristic impedance b, loop gains of communication channel and minimum value of trasmitted impedance from slave side to the master side are considered. The stability of slave side may be enhanced by increasing characteristic impedance b, whereas exssively high value of b may degrade the performance, which imply a tradeoff between stability and performance.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.23 no.5
• /
• pp.36-41
• /
• 2009

In this paper an Investigation into the actual condition of electrical equipment installation for the inspection method development based on IEC 60364. The analysis objects are the difference between electrical equipments installation in korea & electrical equipments installation based on the IEC 60364. The measurement elements are loop impedance, operating characteristic of circuit breaker and protective conductor continuance. As a result, the korea electrical equipments installation was almost same the TT system but some different of protective conductor continuance. Electrical equipments installed TN-C-S has noting problem about installation but manager dose not understand about IEC 60364.

• Journal of Electrical Engineering and Technology
• /
• v.6 no.4
• /
• pp.551-555
• /
• 2011

The Crab label tag with a loop matching feed and a modified dipole antenna structure was proposed. The antenna impedance is conjugated easily to a radio frequency identification IC chip impedance by a loop matching feed. The reading range of the crab structure tag is 0.9-1.0 m from the upper side of the formula milk can lid. The fabricated label tag size is $44.0{\times}44.0mm^2$. The operating frequency at -3 dB return loss is 861.0-929.0 MHz, and the maximum reading range at the anechoic chamber is 1.5 m.

• Journal of information and communication convergence engineering
• /
• v.10 no.2
• /
• pp.103-107
• /
• 2012

An end-launched adapter combining a coaxial loop within a rectangular waveguide has been analyzed and designed. The accurate electromagnetic modeling of input impedance for the adapter design has been developed using a modal analysis method. Also, design parameters to improve the end-launched adapter have been investigated. Numerical and experimental results of the proposed model have been compared with the results of previous works, and verified by an electromagnetic simulator of High Frequency Structure Simulator (HFSS). The input voltage standing wave ratios (VSWRs) are smaller than 2 over the wide frequency band from 7.5 GHz to 10.5 GHz.

• Proceedings of the IEEK Conference
• /
• 2000.06e
• /
• pp.39-42
• /
• 2000

In this paper we design the robust impedance controller of the robot manipulator with time delay. The designed controller considers time delay in the position loop and stabilizes the closed-loop system. The performance of a controller can be easily degraded by external disturbances. To improve the performance when external disturbances exist, we use the disturbance observer to handle the disturbances in the velocity loop and provide robustness to the control system. To show the validity of the designed controller, several experiments are performed for the 5-DOF robot manipulator equipped with the wrist force/torque sensor system.

• Proceedings of the IEEK Conference
• /
• 2000.07b
• /
• pp.604-607
• /
• 2000

In this paper we design the robust impedance controller of the robot manipulator with time delay. The designed controller considers time delay in the position loop and stabilizes the closed-loop system. The performance of a controller can be easily degraded by external disturbances. To improve the performance when external disturbances exist, we use the disturbance observer to handle the disturbances in the velocity loop and provide robustness to the control system. To show the validity of the designed controller, several experiments are performed for the 5-DOF robot manipulator equipped with the wrist force/torque sensor system.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.4
• /
• pp.146-153
• /
• 2008

In this paper, a integrated phase-locked loop(PLL) as a clock multiphase generator for a high speed serial link is designed. The designed PLL keeps the same bandwidth and damping factor by using programmable current mirror in the whole operation frequency range. Also, the close-loop transfer function and VCO's phase-noise transfer function of the designed PLL are obtained with circuit netlists. The self impedance on board-mounted chip is calculated according to sizes and positions of decoupling capacitors. Especially, the detailed self-impedance analysis is carried out between frequency ranges represented the maximum gain in the close-loop transfer function and the maximum gain in the VCO's phase noise transfer function. We shows PLL's jitter characteristics by decoupling capacitor's sizes and positions from this result. The designed PLL has the wide operating range of 0.4GHz to 2GHz in operating voltage of 1.8V and it is designed 0.18-um CMOS process. The reference clock is 100MHz and PLL power consumption is 17.28mW in 1.2GHz.