• Title/Summary/Keyword: Loop Filter

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Microstrip Bandpass Filter Using of a T-Shaped Meander Loop Resonator (Microstrip Bandpass Filter을 이용한 향상된 T-Shaped Meander Loop 공진기)

  • 정주현;오인열;나극환
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2001.11a
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    • pp.157-160
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    • 2001
  • 본 논문에서 5.8GHz의 주파수 대역에서 사용할 수 있는 향상된 커플링 구조와 크기를 줄인 dual-mode microstrip bandpass filter를 설계하였다. 여기서 meander loop resonator를 쓰는 이유는 크기가 작고 방사 손실이 적으며 패턴이 간단하기 때문이다. 또한 이와 비슷한 특성을 갖는 ring, square patch, disk등은 불연속 성분을 가짐으로써 이중모드의 구현이 가능하다. 향상된 형태의 dual-mode microstrip bandpass filter의 변형된 T-shaped meander loop resonator를 소형으로 발전되고. 높은 선택도를 가지는 구조이다. 이 형태의 filter에서 150MHz의 bandwidth을 가지고 5.8GHz주파수를 가지는 구조로 설계하였다.

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Carrier Tracking Loop using the Adaptive Two-Stage Kalman Filter for High Dynamic Situations

  • Kim, Kwang-Hoon;Jee, Gyu-In;Song, Jong-Hwa
    • International Journal of Control, Automation, and Systems
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    • v.6 no.6
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    • pp.948-953
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    • 2008
  • In high dynamic situations, the GPS carrier tracking loop requires a wide bandwidth to track a carrier signal because the Doppler frequency changes more rapidly with time. However, a wide bandwidth allows noises within the bandwidth of the tracking loop to pass through the loop filter. As these noises are used in the numerical controlled oscillator(NCO), the carrier tracking loop of a GPS receiver shows a degraded performance in high dynamic situations. To solve this problem, an adaptive two-stage Kalman filter, which offers the NCO a less noisy phase error, can be used. This filter is based on a carrier phase dynamic model and can adapt to an incomplete dynamic model and a quickly changed Doppler frequency. The performance of the proposed tracking loop is verified by several simulations.

A Low Spur Phase-Locked Loop with FVCO-sampled Feedforward Loop-Filter (스퍼의 크기를 줄이기 위해 VCO 주기마다 전하가 전달되는 구조의 Feedforward 루프필터를 가진 위상고정루프)

  • Choi, Hyek-Hwan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.10
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    • pp.2387-2394
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    • 2013
  • A low spur phase-locked loop (PLL) with FVCO-sampled feedforward loop-filter has been proposed. Conventional PLL has loop filter made of a resistor and capacitors. The proposed PLL is working stably with the filter consisted of capacitors and a switch. It has been designed with a 1.8V $0.18{\mu}m$ CMOS process and proved by simulation with HSPICE.

Performance evaluation of CNN-based in-loop filter for HEVC (CNN 기반 HEVC 루프 필터의 성능 비교)

  • Lee, So Yoon;Hong, Jin Hyung;Oh, Byung Tae
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2017.11a
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    • pp.74-76
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    • 2017
  • In this paper, we introduce the CNN-based in-loop technology for HEVC, and analyze the performance of these algorithms through comparative experiments. The current in-loop filters in HEVC are composed of a deblocking filter that removes noise and a sample adaptive offset filter that compensates for signal offsets. A couple of CNN-based filters replacing the roles of these two algorithms are selected and compared.

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A Test Technique for Performance Evaluation of a Filter and Control Loop on the Missile Vibration using Floating System (부유시스템을 이용한 유도탄 조종루프 진동저감 성능확인 시험기법)

  • Kim, KyungHwan;Park, BumSoo;Lee, Hyun;Kim, SangJae;Chung, JaeWook
    • Journal of the Korea Institute of Military Science and Technology
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    • v.21 no.5
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    • pp.623-629
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    • 2018
  • The acceleration and the angular velocity that include natural frequencies of a missile detected by Inertial Measurement Unit(IMU) are transmitted to the control loop of a missile. The control loop command that is calculated using above signals can cause the resonance of the missile while it flies. Hence it is common to adapt the filter and the control loop for attenuating or eliminating the undesired signals such as natural frequencies. This paper introduces the new test technique using a floating system for performance evaluation of the designed filter and the control loop prior to a flight test. The proposed scheme can check out the degradation property of vibration in the filter and the control loop, while the conventional hardware-in-the-loop simulation(HILS) scheme cannot.

Design of a Triple-Mode Bandpass Filter Using a Closed Loop Resonator

  • Myung, Jae-Yoon;Yun, Sang-Won
    • Journal of electromagnetic engineering and science
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    • v.17 no.2
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    • pp.86-90
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    • 2017
  • In this study, a novel third-order bandpass filter, which is based on a rectangular closed loop resonator, is presented. By adding a series resonator to the conventional loop resonator, the resonator's even resonant mode is split into two modes, while the odd resonant mode is not affected. Therefore, by varying the values of the series resonator elements, the resonant frequencies of two even modes can be determined independent of the odd-mode resonant frequency. In the proposed triple-mode filter design, instead of using a lumped series resonator, a T-shaped transmission line is coupled to the resonator via a small gap. To verify the design method, a filter is designed at 2.4 GHz with a bandwidth of 100 MHz. The improved performances of the proposed triple-mode filter are compared with those of the conventional dual mode filter.

Low Noise Phase Locked Loop with Negative Feedback Loop including Frequency Variation Sensing Circuit (주파수 변화 감지 회로를 포함하는 부궤환 루프를 가지는 저잡음 위상고정루프)

  • Choi, Young-Shig
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.2
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    • pp.123-128
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    • 2020
  • A low phase noise phase locked loop (PLL) with negative feedback loop including frequency variation sensing circuit (FVSC) has been proposed. The FVSC senses the frequency variation of voltage controlled oscillator output signal and controls the volume of electric charge in loop filter capacitance. As the output frequency of the phase locked loop increases, the FVSC reduces the loop filter capacitor charge. This causes the loop filter output voltage to decrease, resulting in a phase locked loop output frequency decrease. The added negative feedback loop improves the phase noise characteristics of the proposed phase locked loop. The size of capacitance used in FVSC is much smaller than that of loop filter capacitance resulting in no effect in the size of the proposed PLL. The proposed low phase noise PLL with FVSC is designed with a supply voltage of 1.8V in a 0.18㎛ CMOS process. Simulation results show the jitter of 273fs and the locking time of 1.5㎲.

Deblocking Filter 및 Adaptive Loop Filter

  • Choe, Hae-Cheol
    • Broadcasting and Media Magazine
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    • v.15 no.4
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    • pp.66-76
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    • 2010
  • HEVC(High Efficiency Video Coding)는 현재 표준화가 진행되고 있는 새로운 비디오 부호화 표준의 가칭이다. 이 표준화에서는 H.264/AVC를 넘어선 높은 부호화 성능을 갖기 위해서 다양한 방법들이 논의되고 있으며, 그 중에서 deblocking filter 및 adaptive loop filter 기술에 대해 본 고에서 설명하고자 한다. 기술적으로 deblokcing 필터와 adaptive loop filter는 양자화 및 부호화 연산과 정에서 손실되는 정보를 줄이기 위해 복원된 영상에 필터링을 수행함으로써주관적화질을향상시키기위한기술이다.

MATHEMATICAL PHASE NOISE MODEL FOR A PHASE-LOCKED-LOOP

  • Limkumnerd, Sethapong;Eungdamrong, Duangrat
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.233-236
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    • 2005
  • Phase noise in a phase-locked-loop (PLL) is unwanted and unavoidable. It is a main concern in oscillation system especially PLL. The phase noise is derived in term of power spectrum density by using a reliable phase noise model. There are four noise sources being considered in this paper, which are generated by reference oscillator, voltage controlled oscillator, filter, and main divider. The major concern for this paper is the noise from the filter. Two types of second order low pass filter are used in the PLL system. Applying the mathematical phase noise model, the output noises are compared. The total noise from the passive filter is lower than the active filter at the offset frequency range between 1 Hz to 33 kHz.

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The Hardware Design of Effective In-loop Filter for High Performance HEVC Decoder (고성능 HEVC 복호기를 위한 효과적인 In-loop Filter 하드웨어 설계)

  • Park, Seungyong;Cho, Hyunpyo;Park, Jaeha;Kang, Byungik;Ryoo, Kwangki
    • Proceedings of the Korea Information Processing Society Conference
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    • 2013.11a
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    • pp.1506-1509
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    • 2013
  • 본 논문에서는 고성능 HEVC(High Efficiency Video Coding) 복호기 설계를 위한 효율적인 in-loop filter의 하드웨어 구조 설계에 대해 기술한다. in-loop filter는 deblocking filter와 SAO로 구성되며, 블록 단위 영상 압축 및 양자화 등에서 발생하는 정보의 손실을 보상하는 기술이다. 하지만 HEVC는 $64{\times}64$ 블록 크기까지 화소 단위 연산을 수행하기 때문에 높은 연산시간 및 연산량이 요구된다. 따라서 본 논문에서 제안하는 in-loop filter의 deblocking filter 모듈과 SAO 모듈은 최소 연산 단위인 $8{\times}8$ 블록 연산기로 구성하여 하드웨어 면적을 최소화하였다. 또한 SAO에서는 $8{\times}8$ 블록의 연산 결과를 내부레지스터에 저장하는 구조로 $64{\times}64$ 블록 크기를 지원하도록 설계하여 연산시간 및 연산량을 최소화 하였다. 제안하는 하드웨어 구조는 Verilog HDL로 설계하였으며, TSMC 칩 공정 180nm 셀 라이브러리로 합성한 결과 동작 주파수는 270MHz이고, 전체 게이트 수는 48.9k이다.