• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.53-56
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• 2003

A linear power amplifier is particularly emphasized on the CDMA system using a linear modulation scheme, because IMD which cause adjacent channel interference and co channel Interference is mostly generated in a nonlinear power amplifier. In this paper, a new type of linearization technique proposed. It is presented that balanced MESFET predistortion linearizer added. Experimental result are present for Korea PCS frequency band. The implemented linearizer is applied to a 30dBm class. A power amplifier for simulation performance. Two-tone signals at 1850 MHz and 1851.23 MHz are injected into the main power amplifier. The main power amplifier with a 12.1dB gain and a P1dB of 30 dBm(two-tone) was utlized. The reduction of IMD is around 22dB.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.7
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• pp.1369-1373
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• 2003

A linear power amplifier is particularly emphasized on the CDMA system using a linear modulation scheme, because IMD which cause adjacent channel interference and co channel interference is mostly generated in a nonlinear power amplifier. In this paper, a new type of linearization technique proposed. It is presented that balanced MESFET Predistortion linearizer added. Experimental result are present for Korea PCS frequency band. The implemented linearizer is applied to a 30㏈m class A power amplifier for simulation performance. Two-tone signals at 1850 MHz and 1851.23 MHz are injected into the main power amplifier. The main power amplifier with a 12.1㏈ gain and a P1㏈ of 30 ㏈m(two-tone) was utilized. The reduction of IMD is around 22㏈.

• Journal of electromagnetic engineering and science
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• v.14 no.2
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• pp.68-73
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• 2014

A linear stacked field-effect transistor (FET) power amplifier (PA) is implemented using a $0.18-{\mu}m$ silicon-on-insulator CMOS process for W-CDMA handset applications. Phase distortion by the nonlinear gate-source capacitance ($C_{gs}$) of the common-source transistor, which is one of the major nonlinear sources for intermodulation distortion, is compensated by employing a PMOS linearizer with improved AM-PM. The linearizer is used at the gate of the driver-stage instead of main-stage transistor, thereby avoiding excessive capacitance loading while compensating the AM-PM distortions of both stages. The fabricated 836.5 MHz linear PA module shows an adjacent channel leakage ratio better than -40 dBc up to the rated linear output power of 27.1 dBm, and power-added efficiency of 45.6% at 27.1 dBm without digital pre-distortion.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.6
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• pp.558-567
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• 1997

Linear power amplifier modules with high-efficiency have been developed for PCS handy phone. These modules were designed using extracted large-signal models of MESFETs and harmonic balance simulation. The modules are intended for low-tier and high-tier at the operation frequency range of 1750 ~ 1780 MHz. For low-tier module, the output power and $IMD_3$ were 23.2 dBm and 31 dBc, respectively, at power-added efficiency of 34% with the supply drain bias of 3.6 V. For high-tier module, the output power and $IMD_3$ were 272.2 dBm and 31 dBc, respectively, at power-added efficiency of 33% with the supply drain bias of 4.2 V. These linear power amplifier modules are suitable for PCS handy phone.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.389-391
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• 2011

This paper has been studied about design of linear 25Watt Power amplifier for VDR(VHF Data Radio). VDR's frequency band is 117.975~137MHz, and CSMA(Carrier Sense Multiple Access), D8PSK(Differential Eight Phase Shift Keyed), 25KHz's channel bandwidth use. It also stated in DO-281A MOPS output power, symbol constellation error, spurious emissions, adjacent channel power must be met. HPA is designed to meet DO-281A standard.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.235-245
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• 2014

This paper presents an envelope tracking power amplifier using a standard CMOS process for the 3GPP long-term evolution transmitters. An efficiency of the CMOS power amplifier for the modulated signals can be improved using a highly efficient and wideband CMOS bias modulator. The CMOS PA is based on a two-stage differential common-source structure for high gain and large voltage swing. The bias modulator is based on a hybrid buck converter which consists of a linear stage and a switching stage. The dynamic load condition according to the envelope signal level is taken into account for the bias modulator design. By applying the bias modulator to the power amplifier, an overall efficiency of 41.7 % was achieved at an output power of 24 dBm using the 16-QAM uplink LTE signal. It is 5.3 % points higher than that of the power amplifier alone at the same output power and linearity.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.73-74
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• 2007

In this paper, we design hybrid limitter balanced(HLB) power amplifier with W-CDMA signal input. Balanced power amplifier is important component that decide efficiency in communication system. General balanced power amplifier has low efficiency and high distortion characteristics. Therefore, we embodied two path with limitter that amplitude path had high efficiency amplifier using limitter and phase path had high linear amplifier to improve such problem.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.118-123
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• 2001

For multi-carrier communication system, power amplifier generate intermodulation products caused by their nonlinear characteristics. Intermodulation products arised around the carrier frequency cannot be filtered out, operate as noise source for tile adjacent channel and thus degrades the quality of communication. In this paper, the 1850MHz-band RF linear power amplifier has been designed and fabricated with feedforward loop. The error signal loop consists of several key components such as phase shifter and attenuator, subtracter. The proposed Linearizer was tested with two-tone signals separated 10MHz apart at the center frequency of 1850MHz. The experimental results show C/I improvement by 14.5${\~}$20dB over 15dB dynamic range(33${\~}$47.8dBm) which gave IMD of 53.25${\~}$59dBc for the designed LPA.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.2 s.344
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• pp.88-93
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• 2006

In this paper, smaller load has been used compared with the conventional Doherty amplifier and PBG structure have been employed to suppress IMD (Inter-modulation Distortion) and improve PAE (Power Added Efficiency). And The PBG structure has been employed on the output macthing network of Doherty amplifier. The proposed power amplifier has been improved more the IMD3 by 5.5 dBc, and the average PAE by $5\%,$ at peak output power, $18\%$ at 8dB back-off point respectively than the conventional Doherty power amplifier.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.10A
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• pp.1072-1077
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• 2007

In this paper, a power amplifier intermodulation distortion has been analyzed to improve linearity and the analysis results are used to minimize the distortion for linear power amplifier design. The proposed design technique is which the intermodulation distortions of the final amplifier are removed by driver intermodulation distortions. This proposed technique is based on AM to AM distortion analysis using power series, and AM to PM distortion analysis results using Bessel function. To verify this technique implement a cellular HPA(High Power Amplifier) 30W. From the results of the implementation and measurement for the linear power amplifier, the spurious characteristic is shown as 50 dBc at 1.98 MHz with 30 W with 20FA. These results show that distortion characteristics are improved as much as 10 dB in spurious characteristic compared with conventional design method.