• 대한토목학회논문집
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• 제14권4호
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• pp.977-988
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• 1994

본 연구는 연약지반상에 sand drain을 타설하고 성토하여 교대 및 교각을 시공하는 진월 인터체인지에서 기초지반의 침하, 융기 및 이미 시공된 교각기초부분의 수평방향 변위를 측정한 실측치와 Sekiguchi의 탄 점소성모델을 Biot의 압밀방정식과 결합하여 2차원 평면변형용조건으로 유한요소해석한 결과를 비교 검토하였다. 이때 교각기초인 강판말뚝은 등가의 강널말뚝벽으로 환산하였다. 그리고 환산한 벽체에 축력의 변화, 강성의 변화, 지지조건의 변화 및 고정점위치의 변화 동에 따른 기초지반의 거동과 강널말뚝벽체의 거동 특성을 밝혔다.

• 전자공학회논문지D
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• 제36D권4호
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• pp.77-85
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• 1999

본 논문은 진성영역에서 공핍증 폭이 선형적으로 변화한다는 가정을 도입하고 전자이동도의 수평 및 수직 전계 이존성을 고려하여 단채널 MOSFET의 {{{{ { I-V }_{ } }}}} 특성에 대한 해석적 모형을 제시하였다. 이 모형으로부터 전 동작영역에 걸쳐 적용되는 문턱전압 방정식과 드레인전류 방정식을 도출하였다. 본 모형의 타당성을 검토하기 위하여 위 식들의 계산을 수행하였고, 그 결과 채널길이가 짧아짐에 따라 문턱전압이 지수함수적으로 감소하였으며, 아울러 채널길이변조, 채널이동로 열화 등을 본 모형에 의하여 일괄적으로 설명할 수 있었다.

• 콘크리트학회논문집
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• 제12권6호
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• pp.119-126
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• 2000

Reinforced concrete structural walls are widely known to provide an efficient lateral load resistance and drift control. However, many reported researches on them are mostly limited to the RC structural walls reinforced according to seismic details. When the pushover analysis technique is used for the prediction of inelastic behavior of frame-wall structures for the seismic evaluation of existing buildings having non-seismic details, the reliability of this analysis method should be checked by the test results. The objective of this study is to verify the correlation between the experimental and analytical responses of a high-rise reinforced concrete frame-wall structure having non-seismic details by using DRAIN-2DX program[11] and the test results performed previously[1]. It is concluded that the behavior of the frame-wall model is mainly affected by the fixed-end rotation(uplift at base) and bending deformation of the wall and that the analysis with the LINKS model[10] in DRAIN-2DX describes them with good reliability.

• Journal of Semiconductor Engineering
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• 제3권2호
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• pp.161-167
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• 2022

Electrical characteristics of LDMOS power device with LDD(Lightly Doped Drain) structure is studied with variation of the region of channel and LDD. The channel in LDMOSFET encloses a junction-type source and is believed to be an important parameter for determining the circuit operation of CMOS inverter. Two-dimensional TCAD MEDICI simulation is used to study hot-carrier effect, on-resistance Ron, breakdown voltage, and transient switching characteristic. The voltage-transfer characteristics and on-off switching properties are studied as a function of the channel length and doping levels. The digital logic levels of the output and input voltages are analyzed from the transfer curves and circuit operation. Study indicates that drain current significantly depends on the channel length rather than the LDD region, while the switching transient time is almost independent of the channel length. The high and low logic levels of the input voltage showed a strong dependency on the channel length, while the lateral substrate resistance from a latch-up path in the CMOS inverter was comparable to that of a typical CMOS inverter with a guard ring.

• 한국전기전자재료학회논문지
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• 제32권3호
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• pp.201-206
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• 2019

This report constitutes the first demonstration in Korea of single-crystal lateral gallium oxide ($Ga_2O_3$) as a metal-oxide-semiconductor field-effect-transistor (MOSFET), with a breakdown voltage in excess of 480 V. A Si-doped channel layer was grown on a Fe-doped semi-insulating ${\beta}-Ga_2O_3$ (010) substrate by molecular beam epitaxy. The single-crystal substrate was grown by the edge-defined film-fed growth method and wafered to a size of $10{\times}15mm^2$. Although we fabricated several types of power devices using the same process, we only report the characterization of a finger-type MOSFET with a gate length ($L_g$) of $2{\mu}m$ and a gate-drain spacing ($L_{gd}$) of $5{\mu}m$. The MOSFET showed a favorable drain current modulation according to the gate voltage swing. A complete drain current pinch-off feature was also obtained for $V_{gs}<-6V$, and the three-terminal off-state breakdown voltage was over 482 V in a $L_{gd}=5{\mu}m$ device measured in Fluorinert ambient at $V_{gs}=-10V$. A low drain leakage current of 4.7 nA at the off-state led to a high on/off drain current ratio of approximately $5.3{\times}10^5$. These device characteristics indicate the promising potential of $Ga_2O_3$-based electrical devices for next-generation high-power device applications, such as electrical autonomous vehicles, railroads, photovoltaics, renewable energy, and industry.

• Anatomy and Cell Biology
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• 제56권2호
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• pp.200-204
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• 2023

Although in counterpart, the sphenopalatine artery (SPA), has been well described in the medical literature, the sphenopalatine vein (SPV) has received scant attention. Therefore, the present anatomical study was performed. Additionally, we discuss the variations, embryology, and clinical significance of the SPV. Adult cadaveric specimens underwent dissection of the SPV. In addition, some specimens were submitted for histological analysis of this structure. The SPV was found to drain from the sphenoidal sinus and nasal septum. Small tributaries traveled through the nasal septum with the posterior septal branches of the SPA and nasopalatine nerve. The SPA and SPV were found to travel through the sphenopalatine foramen and another tributary was found to perforate the medial plate of the pterygoid process and to connect to the pterygoid venous plexus which traveled lateral to the medial plate of the pterygoid process. The vein traveled through the posterior part of the lateral wall of the nasal cavity with the posterior lateral nasal branches of the SPA and the lateral superior posterior nasal branches of the maxillary nerve. To our knowledge, this is the first anatomical study on the SPV in humans. Data on the SPV provides an improved anatomical understanding of the vascular network of the nasal cavity. Developing a more complete picture of the nasal cavity and its venous supply might help surgeons and clinicians better manage clinical entities such as posterior epistaxis, cavernous sinus infections, and perform endoscopic surgery with fewer complications.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.305-308
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• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

• 대한전자공학회논문지SD
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• 제42권3호
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• pp.1-8
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• 2005

본 논문에서는 $0.1\;{\mu}m$ 이하의 게이트 길이를 갖는 MHEMT의 DC 및 RF 특성을 상용 시뮬레이터인 ISE-TCAD tool을 이용하여 결과를 고찰하였다. 이후 MHEMT의 게이트 길이와, 소스-드레인 간격 및 채널 두께를 변화시켜 가면서 소자의 수평, 수직 Scaling효과가 소자 특성에 미치는 영향을 비교하였으며, 게이트 길이 $(L_g)$가 $0.1\;{\mu}m$ 이하로 감소함에 따라 $g_{m,max}$가 같이 감소하는 현상에 대해서 논의해 보았다. 또한 이 현상을 가지고 소자의 횡적, 종적 파라미터의 scaling 효과에 대한 모델을 제시 했다.

• Journal of Advanced Marine Engineering and Technology
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• 제30권8호
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• pp.901-906
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• 2006

In this paper, the power amplifier using active bias circuits for LDMOS(Lateral Diffused Metal Oxide Semiconductor) MRF-21180 is designed and fabricated. According to change the temperature, the gate voltage of LDMOS is controlled by the fabricated active bias circuits which is made of PNP transistor to suppress drain current. The driving amplifier using MRF-21125 and MRF-21060 is made to drive the LDMOS MRF-21180 power amplifier. The variation of current consumption in the fabricated 60 watt power amplifier has an excellent characteristics of less than 0.1 A, whereas a passive biasing circuit dissipates more than 0.5 A. The implemented power amplifier has the gain over 9 dB, the gain flatness of less than $\pm$0.1 dB and input and output return loss of less than -6 dB over the frequency range 2.11 $\sim$ 2.17 GHz. The DC operation point of this power amplifier at temperature variation 0 $^{\circ}C$ to 60 $^{\circ}C$ is fixed by active bias circuit.

• 한국지반공학회논문집
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• 제17권4호
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• pp.209-220
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• 2001

준설매립지반 표층강도증진을 위한 수평진공배수공법 적용시의 압밀현상 예측을 위한 연구를 수행하였다. 초연약지반에 수평배수재와 진공압을 이용하여 수평진공배수 공법을 적용할 경우, 배수재 부근에서 3차원적 배수특성과 넓은 범위의 유효응력의 변화, 지반의 압축성 및 투수성이 크게 변화하게 된다. 이를 위하여 3차원 배수특성과 다양한 경계조건, 부의 간극수압 발생을 통한 유효응력의 증가, 유효응력에 따른 압축성과 투수성의 비선형성을 포함할 수 있도록 기존의 3차원 압밀 지배방정식을 확장 유도하였고, 유효응력-간극비-투수계수의 관계를 누승형태의 함수로 표현하여 사용하였다. 해석기법의 타당성을 검증하기 위하여 실내에서 수행된 대형 토조실험 결과를 모델링하여 좋은 일치를 확인하였고, 이를 바탕으로 수평진공배수공법 적용시의 압밀효과에 대한 분석결과 드레인이 타설된 상부지반에서는 균등한 개량효과의 결과를, 하부의 미개량 지반에서는 자중압밀에 의한 압밀효과를 확인할 수 있었으며 배수재의 수평타설 간격에 따른 압밀효과 분석을 통하여 적정 배수재 설치간격의 범위를 확인하였다.