• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.583-586
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• 2005

In this paper, millimeter-wave monolithic integrated circuit (MIMIC) low noise amplifier (LNA) for V-band, which is applicable to 58 GHz, we designed and fabricated. We fabricated the module using the fabricated LNA chips. The V-band MIMIC LNA was fabricated using the high performance $0.1\;{\mu}\;m$ ${\Gamma}-gate$ pseudomorphic high electron mobility transistor (PHEMT). The MIMIC LNA was designed using active and passive device library, which is composed $0.1\;{\mu}\;m$ ${\Gamma}-gate$ PHEMT and coplanar waveguide (CPW) technology. The designed V-band MIMIC LNA was fabricated using integrated unit processes of active and passive device. Also we fabricated CPW-to-waveguide fin-line transition of WR-15 type for module. The Transmission Line was fabricated using RT Duroid 5880 substrate. The measured results of V-band MIMIC LNA and Module are shown $S_{21}$ gain of 13.1 dB and 8.3 dB at 58 GHz, respectively. The fabricated LNA chip and Module in this work show a good noise figure of 3.6 dB and 5.6 dB at 58 GHz, respectively.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.5
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• pp.7-13
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• 1997

A X-band 3-stage monolithic LNA (low noise amplifier) with series feedback has been successfully desined and demonstrated by suign 0.5-$\mu\textrm{m}$ GaAs MESFET. In the design of the 3-stage LNA, the effects of series feedback to the noise figure, the gain, and the stability have been investigated ot find the optimal short stub length. As a result, the inductive series feedback topology which has 10degree short stub in the GaAs MESFET source lead, has been employed in the 1-st stage. The fabricated MMIC LNA's chip size is only 1mm$^{2}$/stage, which is smaller than the previously reported X-band MMIC input/output return losses are less than -10dB and -15dB, respectively. The noise figure (NF) is less than 2.6dB. The measured data show good agreement with the simulated values.

• Journal of Advanced Information Technology and Convergence
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• v.10 no.1
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• pp.37-43
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• 2020

This paper presents analysis of passive metal interconnection of the LNA block in CMOS integrated circuit. The performance of circuit is affected by the geometry of RF signal path. To investigate the effect of interconnection lines, a cascode LNA is designed, and circuit simulations with full-wave electromagnetic (EM) simulations are executed for different positions of a component. As the results, the position of an external capacitor (C_ex) changes the parasitic capacitance of electric coupling; the placement of component affects the circuit performance. This analysis of interconnection line is helpful to analyze the amount of electromagnetic coupling between the lines, and useful to choose the signal path in the layout design. The target of this work is the RF LNA enabling the seamless connection of wireless data network and the following standards have to be supported in multi-band (WCDMA: 2.11~ 2.17 GHz, CDMA200 1x : 1.84~1.87 GHz, WiBro : 2.3~2.4GHz) mobile application. This work has been simulated and verified by Cadence spectre RF tool and Ansoft HFSS. And also, this work has been implemented in a 0.13um RF CMOS technology process.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.9
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• pp.1045-1049
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• 2010

In this paper, we proposed an ultra-low power low noise amplifier(LNA) using a TSMC 0.18 ${\mu}m$ RF CMOS process. To satisfy the low power consumption with high gain, a current-reused technique is utilized. In addition, a low bias voltage in the subthreshold region is utilized to achieve ultra low power characteristic. The designed LNA has the voltage gain of 13.8 dB and noise figure(NF) of 3.4 dB at 2.4 GHz. The total power consumption of the designed LNA is only 0.63 mW from 0.9 V supply voltage and chip occupies $1.1\;mm{\times}0.8\;mm$ area.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.2
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• pp.175-180
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• 2015

In this paper, GPS / GLONASS receiving a small active antenna is proposed. A microstrip patch antenna which supports dual-band (GPS and GLONASS) was optimized. The antenna size is $13{\times}13{\times}3.6mm$. The jig was changed to confirm the proposed antenna characteristic size, was adjusted to feed gap of the patch antenna, it was confirmed by change in LNA shield case or not. The antenna jig size is $65.6{\times}13{\times}0.8mm$. The maximum gain of the GPS band is 3.78dBi, the maximum gain of the GLONASS bands is 4dBi. To amplify the Satellite reception signal level, one-stage low noise amplifier(LNA) was designed. The LNA chip was using the BGA715 N7, the LNA gain is 19.9dB. The utilization possibility of the GPS / GLONASS receiving a small active antenna could be confirmed according to compare and analyze the simulation and measurement data.

• Journal of Korea Society of Digital Industry and Information Management
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• v.20 no.2
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• pp.63-74
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• 2024

This Paper presents a resistive wideband fully differential low-noise amplifier (LNA) designed using a noise-cancellation technique for TV tuner applications. The front-end of the LNA employs a cascode common-gate (CG) configuration, and cross-coupled local feedback is employed between the CG and common-source (CS) stages. The moderate gain at the source of the cascode transistor in the CS stage is utilized to boost the transconductance of the cascode CG stage. This produces higher gain and lower noise figure (NF) than a conventional LNA with inductor. The NF can be further optimized by adjusting the local open-loop gain, thereby distributing the power consumption among the transistors and resistors. Finally, an optimized DC gain is obtained by designing the output resistive network. The proposed LNA, designed in SK Hynix 180 nm CMOS, exhibits improved linearity with a voltage gain of 10.7 dB, and minimum NF of 1.6-1.9 dB over a signal bandwidth of 40 MHz to 1 GHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.100-105
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• 2010

A multi-band low noise amplifier (LNA) is designed in 90 nm RF CMOS process for 3GPP LTE (3rd Generation Partner Project Long Term Evolution) applications. The designed multi-band LNA covers the eight frequency bands between 1.85 and 2.8 GHz. A tunable input matching circuit is realized by adopting a switched capacitor array at the LNA input stage for providing optimum performances across the wide operating band. Current steering technique is adopted for the gain control in three steps. The performances of the LNA are verified through post-layout simulations (PLS). The LNA consumes 17 mA at 1.2 V supply voltage. It shows a power gain of 26 at the normal gain mode, and provides much lower gains of 0 and -6.7 in the bypass-I and -II modes, respectively. It achieves a noise figure of 1.78 dB and a IIP3 of -12.8 dBm over the entire band.

• The Journal of the Korea Contents Association
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• v.6 no.4
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• pp.1-10
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• 2006

In this paper, a broadband RF module is designed and tested for 2.4GHz band applications. The RF module is composed of a low noise amplifier (LNA) with a three stage amplifier, a single ended gate mixer, matching circuits, a hairpin line band pass filter and a Chebyshev low pass filter to convert the radio frequency (RF) into the intermediate frequency (IF). The LNA has a high gain and stability, and the single ended gate mixer has a high conversion gain and wide dynamic range. In the analysis of the broadband RF module, the composite harmonic balance technique is used to analyze the operating characteristics of an RF module circuit. The RF module has a 55.2dB conversion gain with a 1.54dB low noise figure, $-120{\sim}-60dBm$ wide RF power dynamic range, -60dBm low harmonic spectrum and a good isolation factor among the RF, IF, and local oscillator (LO) ports.

• ETRI Journal
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• v.33 no.3
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• pp.462-465
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• 2011

A millimeter-wave (mm-wave) high-linear low-noise amplifier (LNA) is presented using a 0.18 ${\mu}m$ standard CMOS process. To improve the linearity of mm-wave LNAs, we adopted the multiple-gate transistor (MGTR) topology used in the low frequency range. By using an MGTR having a different gate-source bias at the last stage of LNAs, third-order input intercept point (IIP3) and 1-dB gain compression point ($P_{1dB}$) increase by 4.85 dBm and 4 dBm, respectively, without noise figure (NF) degradation. At 33 GHz, the proposed LNAs represent 9.5 dB gain, 7.13 dB NF, and 6.25 dBm IIP3.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.304-308
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• 2003

In this paper, two-stage low noise amplifier(LNA) for 24GHz is designed and fabricated using NE450284C HJ-FET of NEC CO. In order to get noise figure and input VSWR to be wanted, it is considered input VSWR and noise figure simultaneously in matching-circuit designing. The fabricated two-stage low noise amplifier has the gain of 16.6dB, input VSWR of 1.6, and output VSWR under 1.5.