• Journal of electromagnetic engineering and science
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• 제18권2호
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• pp.141-143
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• 2018

Two 110-GHz oscillators have been developed in 65-nm CMOS technology. To study the effect of layout on the circuit performance, both oscillators had the same LC cross-coupled topology but different layout schemes of the circuit. The oscillator with the conventional cross-coupled design (OSC1), showed an output power of -3.9 dBm at 111 GHz with a phase noise of -75 dBc/Hz at 1-MHz offset. On the other hand, OSC2, with a modified cross-coupled line layout, generated an output power of -2.0 dBm at 117 GHz with a phase noise of -77 dBc/Hz at 1-MHz offset. The result indicates that the optimized layout can improve key oscillator performances such as oscillation frequency and output power.

• 대한전자공학회논문지SD
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• 제45권1호
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• pp.50-55
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• 2008

본 논문에서는 $0.35-{\mu}m$ CMOS 공정을 이용 $8{\sim}10.9$ GHz 밴드를 갖는 새로운 구조의 LC VCO를 설계 제안하였다. 이 회로 구성은 LC 탱크 기반의 전형적인 NMOS, PMOS cross-coupled 쌍을 병렬로 구성한 새로운 구조로 상보적인 NMOS와 PMOS 꼬리 전류와 같은 MOS cross-coupled쌍과 출력 버퍼로 구성하였다. 본 논문에서 제시한 구조로 설계된 LC VCO는 8GHz에서 10.9GHz까지로 29%의 증가된 튜닝 범위와 6.48mV의 낮은 전력소모를 가지는 것을 확인하였고 이의 core size는 $270{\mu}m{\times}340{\mu}m$, 시뮬레이션을 통한 VCO의 위상잡음은 1MHz와 10MHz offset에서 각각 -117dBc/Hz와 -137dBc/Hz이다. FOM은 10GHz의 중심 주파수으로 부터 1MHz offset에서 -189dBc/Hz를 가진다. 제안한 설계방법은 10Gb/s급의 클럭과 데이터 복원회로 그리고 SONET 통신응용에 매우 유용하다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.127-128
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• 2006

The proposed differential LC cross-coupled VCO is implemented in InGap/GaAs HBT process for an adaptive Global Positioning system(GPS) application. Two filtering capacitors are used at the base of output buffer amplifiers at the both sides of the core m order to improve phase noise characteristics. The VCO produced a phase noise of -133 dBc/Hz at 3MHz offset frequency from the carrier frequency of 1.489GHz and the second harmonic suppression is significantly suppresed up to -49dBc/Hz in simulation result. The three pairs of BC diodes are integrated m the tank circuit to increase the VCO Tunning range.

• Journal of electromagnetic engineering and science
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• 제4권4호
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• pp.168-174
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• 2004

A bandwidth-enhanced and phase noise-improved differential LC-tank VCO is proposed in this paper. By connecting the varactors to the bases of the cross-coupled transistors of the proposed LC-tank VCO, its input negative resistance has been widened. Also, the feedback capacitor Cc in the cross-coupling path of the proposed LC-tank VCO attenuates the output common-mode level modulated by the low-frequency noise because the modulated common-mode level jitters the varactor bias point and degrades phase noise. Compared with the fabricated conventional LC-tank VCO, the proposed LC-tank VCO demonstrates $200\;\%$ enhancement in tuning range, and 6 - dB improvement in phase noise at 6 MHz offset frequency from 5.4-GHz carrier. We achieved the phase noise of - 106 dBc/Hz at 6 MHz offset, and $10\;\%$ tuning range from the proposed LC-tank VCO. The proposed LC-tank VCO consumes 12 mA at 2.5 V supply voltage.

• 한국전자파학회논문지
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• 제23권3호
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• pp.361-366
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• 2012

본 논문에서는 TSMC 0.18 ${\mu}m$ CMOS 공정을 사용하여 저전력, 5.2 GHz 대역 저잡음 증폭기를 설계하였다. 제안된 회로는 5.2 GHz 대역 저잡음 증폭기 설계를 위해, 공통 게이트 구조를 이용하여 입력 정합을 하였다. 입력 정합단에 캐패시터 크로스 커플링 방법을 사용하여 적은 양의 전류를 흘려 적당한 이득을 얻었다. 추가적인 전력 소비 없이 부족한 이득을 증가시키기 위하여 전류 재사용 방법을 이용하여 공통 게이트 증폭단 위에 공통 소스 구조를 추가하였다. 전류 재사용단의 인덕터의 크기를 줄이기 위하여 캐패시터를 병렬로 연결함으로써 실효 인덕턴스 값을 증가시켜 인덕터의 크기를 줄였다. 제안된 회로는 5.2 GHz 대역에서 17.4 dB의 이득과 2.7 dB의 잡음 지수 특성을 갖는다. 저잡음 증폭기는 1.8 V의 공급 전압에 대해 5.2 mW의 전력을 소비한다.

• ETRI Journal
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• 제27권5호
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• pp.473-483
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• 2005

In this paper, we propose two LC voltage-controlled oscillators (VCOs) that improve both phase noise and tuning range. With both 1/f induced low-frequency noise and low-frequency thermal noise around DC or around harmonics suppressed significantly by the employment of a current-current negative feedback (CCNF) loop, the phase noise in the CCNF LC VCO has been improved by about 10 dB at 6 MHz offset compared to the conventional LC VCO. The phase noise of the CCNF VCO was measured as -112 dBc/Hz at 6 MHz offset from 5.5 GHz carrier frequency. Also, we present a bandwidth-enhanced LC VCO whose tuning range has been increased about 250 % by connecting the varactor to the bases of the cross-coupled pair. The phase noise of the bandwidth-enhanced LC-tank VCO has been improved by about 6 dB at 6 MHz offset compared to the conventional LC VCO. The phase noise reduction has been achieved because the DC-decoupling capacitor Cc prevents the output common-mode level from modulating the varactor bias point, and the signal power increases in the LC-tank resonator. The bandwidth-enhanced LC VCO represents a 12 % bandwidth and phase noise of -108 dBc/Hz at 6 MHz offset.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권4호
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• pp.295-301
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• 2008

Recently, the demand on mm-wave (millimeter-wave) applications has increased dramatically. While circuits operating in the mm-wave frequency band have been traditionally implemented in III-V or SiGe technologies, recent advances in Si MOSFET operation speed enabled mm-wave circuits realized in a Si CMOS technology. In this work, a 58 GHz CMOS LC cross-coupled VCO (Voltage Controlled Oscillator) was fabricated in a $0.13-{\mu}m$ Si RF CMOS technology. In the course of the circuit design, active device models were modified for improved accuracy in the mm-wave range and EM (electromagnetic) simulation was heavily employed for passive device performance predicttion and interconnection parasitic extraction. The measured operating frequency ranged from 56.5 to 58.5 GHz with a tuning voltage swept from 0 to 2.3 V. The minimum phase noise of -96 dBc/Hz at 5 MHz offset was achieved. The output power varied around -20 dBm over the measured tuning range. The circuit drew current (including buffer current) of 10 mA from 1.5 V supply voltage. The FOM (Figure-Of-Merit) was estimated to be -165.5 dBc/Hz.

• Journal of electromagnetic engineering and science
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• 제17권2호
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• pp.98-104
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• 2017

This work describes the development and comparison of two phase-locked loops (PLLs) based on a 65-nm CMOS technology. The PLLs incorporate two different topologies for the output voltage-controlled oscillator (VCO): LC cross-coupled and differential Colpitts. The measured locking ranges of the LC cross-coupled VCO-based phase-locked loop (PLL1) and the Colpitts VCO-based phase-locked loop (PLL2) are 119.84-122.61 GHz and 126.53-129.29 GHz, respectively. Th e output powers of PLL1 and PLL2 are -8.6 dBm and -10.5 dBm with DC power consumptions of 127.3 mW and 142.8 mW, respectively. Th e measured phase noise of PLL1 is -59.2 at 10 kHz offset and -104.5 at 10 MHz offset, and the phase noise of PLL2 is -60.9 dBc/Hz at 10 kHz offset and -104.4 dBc/Hz at 10 MHz offset. The chip sizes are $1,080{\mu}m{\times}760{\mu}m$ (PLL1) and $1,100{\mu}m{\times}800{\mu}m$ (PLL2), including the probing pads.

• Journal of Electrical Engineering and Technology
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• 제13권6호
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• pp.2441-2446
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• 2018

This paper presents a radio frequency-to-direct current (RF-to-DC) converter for special RF power harvesting application at 915 MHz. The major featured components of the proposed RF-to-DC converter is the combination of a cross-coupled rectifier and an active diode: first, the cross-coupled rectifier boosts the input voltage to desired level, and an active diode blocks the reverse current, respectively. A prototype was implemented using $0.18{\mu}m$ CMOS technology, and the performance was proven from the fact that the targeted RF harvesting system's full-operation with higher power efficiency; even if the system's input power gets lower (e.g., from nominal 0 to min. -12 dBm), the proposed RF-to-DC converter constantly provides 1.47 V, which is exactly the voltage level to drive follow up system components like DC-to-DC converter and so on. And, maximum power conversion efficiency is 82 % calculated from the 0 dBm input power, 2.3 mA load current.

• 한국전자파학회논문지
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• 제22권3호
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• pp.399-405
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• 2011

본 논문에서는 130 nm RF CMOS 공정을 이용하여 77 GHz 자동차용 레이더 센서에 응용 가능한 Q-band LC 전압 제어 발진기(Voltage Controlled Oscillator: VCO)와 주입 잠금(injection locking) 버퍼를 설계한 결과를 보인다. LC 탱크의 위상 잡음 특성 개선을 위해 전송선을 이용하였고, 버퍼는 능동 소자 교차 결합쌍(cross-coupled pair)의 부성 저항(negative resistance)단을 이용해 발진 유무에 관계없이 높은 출력 전력을 가지도록 설계하였다. 측정된 위상 잡음은 1 MHz 오프셋 주파수에서 -102 dBc/Hz이며, 주파수 조정 범위는 34.53~35.07 GHz이다. 또한, 모든 주파수 조정 범위에서 출력 전력은 4.1 dBm 이상의 값을 가진다. 제작된 칩의 사이즈는 $510{\times}130\;um^2$이며, 1.2 V 바이어스 전압에서 LC 전압 제어 발진기가 10.8 mW, 주입 잠금 버퍼가 50.4 mW의 전력 소모를 가진다.