• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.6
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• pp.445-451
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• 2019

An input power estimation method of a three-phase inverter for the high-efficiency operation of AC motors is proposed. Measuring devices, such as DC link voltage and input current sensors, are required to obtain the input power of the inverter. In the proposed method, the input power of the inverter can be estimated without the input current sensor by using the phase current information of the AC motor and the switching pattern of the inverter. The proposed method is more robust to parameter error than conventional method. The validity of the input power estimation method is verified through experiments conducted on a 1 kW permanent-magnet synchronous motor drive system.

• Journal of Power Electronics
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• v.10 no.3
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• pp.293-299
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• 2010

In this paper, a single-phase PFC (Power Factor Correction) dual boost converter based on input voltage estimation is studied for DC inverter air conditioner. It is focused on improving input power factor and power quality to satisfy the recent harmonic current regulation standards. Furthermore the input voltage estimation is introduced for price competitive products. A low cost and reasonable control system is implemented using a specified high-speed 32-bit microprocessor. Their effectiveness are verified through theoretical analysis and experiments.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.53 no.2
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• pp.114-122
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• 2004

This paper presents a novel single-stage active-clamp type high frequency resonant inverter. The proposed topology is integrated full-bridge boost rectifier as power factor corrector and active-clamp type high frequency resonant inverter into a single-stage. The input stage of the full-bridge boost rectifier works in discontinuous conduction mode(DCM) with constant duty cycle and variable switching frequency. So that a boost converter makes the line current follow naturally the sinusoidal line voltage waveform. By adding additional active-clamp circuit to conventional class-E high frequency resonant inverter, main switch of inverter part operates not only at Zero-Voltage-Switching mode but also reduces the switching voltage stress of main switch. Simulation results have demonstrated the feasibility of the proposed high frequency resonant inverter. Characteristics values based on characteristics estimation through circuit analysis is given as basis data in design procedure. Also, experimental results are presented to verify theoretical discussion. This proposed inverter will be able to be practically used as a power supply in the fields of induction heating applications, fluorescent lamp and DC-DC converter etc.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.10
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• pp.1317-1326
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• 1999

As the integration ratio and operation speed increase, it has become an important problem to estimate the dissipated power during the design procedure as a method to reduce the TTM(time to market). This paper proposed a prediction model to estimate the maximum dissipated power of a CMOS logic gate. This model uses a calculational method. It was formed by including the characteristics of MOSFETs of which a CMOS gate consists, the operational characteristics of the gate, and the characteristics of the input signals. As the modeling process, a maximum power estimation model for CMOS inverter was formed first, and then a conversion model to convert a multiple input CMOS gate into a corresponding CMOS inverter was proposed. Finally, the power model for inverter was applied to the converted result so that the model could be applied to a general CMOS gate. For experiment, several CMOS gates were designed in layout level by $0.6{\mu}m$ layout design rule. The result by comparing the calculated results with those from HSPICE simulations for the gates showed that the gate conversion model has within 5% of the relative error rate to the SPICE and the maximum power estimation model has within 10% of the relative error rate. Thus, the proposed models have sufficient accuracies. Also in calculation time, the proposed models was more than 30 times faster than SPICE simulation. Consequently, it can be said that the proposed model could be used efficiently to estimate the maximum dissipated power of a CMOS logic gate during the design procedure.

• Proceedings of the KIEE Conference
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• 2003.07b
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• pp.1190-1192
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• 2003

This paper presents a novel single-stage high frequency resonant inverter link type DC-DC converter using zero voltage switching with high input power factor. The proposed high frequency resonant converter integrates half-bridge boost rectifier as power factor corrector (PFC) and half-bridge resonant converter into a single stage. The input stage of the half-bridge boost rectifier is working in discontinuous conduction mode(DCM) with constant duty cycle and variable switching frequency. So that boost converter make the line current follow naturally the sinusoidal line voltage waveform. Experimental results have demonstrated the feasibility of the proposed DC-DC converter. This proposed converter will be able to be practically used as a power supply in various fields as induction heating applications, DC-DC converter etc.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.7
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• pp.1007-1013
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• 2012

Modeling of photovoltaic power systems is significant to analytically predict its dynamics in practical applications. This paper presents a novel modeling algorithm of such system by using probability and statistic theories. We first establish a linear model basically composed of Fourier parameter sets for mapping the input/output variable of photovoltaic systems. The proposed model includes solar irradiation and ambient temperature of photovoltaic modules as an input vector and the inverter power output is estimated sequentially. We deal with these measurements as random variables and derive a parameter learning algorithm of the model in terms of statistics. Our learning algorithm requires computation of an expectation and joint expectation against solar irradiation and ambient temperature, which are analytically solved from the integral calculus. For testing the proposed modeling algorithm, we utilize realistic measurement data sets obtained from the Seokwang Solar power plant in Youngcheon, Korea. We demonstrate reliability and superiority of the proposed photovoltaic system model by observing error signals between a practical system output and its estimation.

• The Transactions of the Korean Institute of Power Electronics
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• v.3 no.1
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• pp.36-45
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• 1998

A simple source voltage clamped resonant link (SVCRL) inverter is proposed to clamp the DC link voltage to the input source voltage and reduce the current rating of resonant inductor. The current control of a permanent magnet synchronous motor (PMSM) using a predictive current control technique (PCCT) employing the SVCRL inverter is also investigated to overcome the disadvantage of the current regulated delta modulation (CRDM) control technique. By using the PCCT based on the discrete model of a PMSM and estimation of back EMF, the minimized current ripple with small number of switchings can be obtained. Finally, the comparative computer simulation and experimental results are given to show the usefulness of the proposed technique.

• Journal of Power Electronics
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• v.18 no.2
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• pp.432-444
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• 2018

This paper presents a capacitor voltage balancing topology using a three-level boost converter (TLBC) for a neutral point clamped (NPC) three-level inverter fed surface permanent magnet synchronous motor drive (SPMSM). It enhanced the performance of the drive in terms of its voltage THD and torque pulsation. The main attracting feature of the proposed control is the boosting of the input voltage and at the same time the balancing of the capacitor voltages. This control also reduces the computational complexity. For the purpose of close loop vector control, a software based cost effective resolver to digital converter RDC-less estimation is implemented to calculate the speed and position. The proposed drive is simulated in the MATLAB/SIMULINK environment and an experimental investigation using dSPACE DS1104 validates the proposed drive system at different operating condition.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.9
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• pp.54-65
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• 1999

As the integration ratio and operating speed increase, it has become an important problem to estimate the dissipated power during the design procedure to reduce th TTM(time to market). This paper proposed a prediction model for the maximum dissipated power of a CMOS logic gate. This model uses a calculating method. It was constructed by including the characteristics of MOSFETs, the operational characteristics of the gate, and the characteristics of the input signals. As the construction procedure, a maximum power estimation model for CMOS inverter was formed first, And then, a conversion model to convert a multiple input CMOS gate into a corresponding CMOS inverter was proposed. Finally, the power model for inverter was applied to the converted result so that the model could be applied to a general CMOS gate. We designed several CMOS gates in layout level with $0.6{\mu}m$ design rule to apply both to HSPICE simulation and to the proposed models. The comparison between the two results showed that the gate conversion model and the power estimation model had within 5% and 10% of the relative errors, respectively. Those values show that the proposed models have sufficient accuracies. Also in calculation time, the proposed models were more than 30 times faster than HSPICE simulation. Consequently, it can be said that the proposed model could be used efficiently to estimate the maximum dissipated power of a CMOS logic gate during the design procedure.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.4
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• pp.322-331
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• 2002

In this paper, a single-phase to three-phase PWM converter topology using a single-phase half-bridge PWM rectifier and a 2-leg inverter for low cost three-phase induction motor drives is proposed. In addition, the source voltage sensor is eliminated with a state observer which controls the deviation between the model current and the system current to be zero. The converter topology is of lower cost than the conventional one, which gives sinusoidal input current, unity power factor, dc output voltage control, bidirectional power flow and VVVF output voltage. The experimental results for V/F control of 3Hp induction motor drives have been shown.