• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.19 no.6
• /
• pp.183-189
• /
• 2019

Despite its low cost, ARM is widely used in smartphones, digital cameras, home network devices, and wireless technologies because of its low power consumption and reliable performance. The domestic memory semiconductor design technology is in the world's highest level, but that of the processor is far less than that, which results in the technology unbalance between the memory and the processor. When designing a processor, exception and interrupt capabilities are requisite, but this is often omitted in the research stage. However, exception processing and interrupts must be included in order for the processor to function fully. In this paper, we design a 32-bit ARMv4 family of processors with exception handling and interrupts using VHDL and verify with ModelSim. As a result, ARM's exception and interrupts are successfully performed.

• Journal of Korea Multimedia Society
• /
• v.16 no.1
• /
• pp.75-86
• /
• 2013

This paper presents a technique to implement embedded systems using interrupts of the one-chip microcontroller with many peripherals based on a multiple finite state machines model. The multiple finite state machine model utilizes the structure of FSMD used for hardware design and the features of flow control by interrupts. The main finite state machine corresponds to the main program and the sub-state machines corresponds to the interrupt subroutines. Therefore, interrupts from the peripherals can be processed immediately in the sub-state machines. The request and reply variables are used to interface between the finite state machines. Additional operating system is not necessary for the context switching between the main state machine and the sub-state machine, because the flow-control caused by interrupt can be replaced with the switching. An embedded system modeled on multiple finite state machine with ASM charts can be easily implemented by the conversion of ASM charts into C-language programs. This implementation technique can be easily adopted to the hardware oriented embedded systems because of the detail description of the model and the fast response to the interrupt events in the sub-state machine.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.12 no.3
• /
• pp.1380-1386
• /
• 2011

The request of interrupt accompanies a context switching. If the interrupt is frequently requested, this overhead of context switching can reduce seriously the performance of embedded systems. In order to reduce processing overhead due to frequently requested communication interrupts at Asynchronous Serial Communication, this paper introduces the method of Expanded Asynchronous Serial Communication with the Interrupt Coalescence(IC) that accumulates a fixed number of interrupts and processes them in one time. we implement the existing Asynchronous Serial Communication that requests communication interrupts by one byte at an LN2440SBC embedded board with a uC/OS-II and compare interrupt processing time for the performance evaluation about proposed method. As a result, the communication interrupt processing time of proposed method appears in case of low speed(9,600 bps), the decline of an average 25.18% at transmission, the decline of an average 41.47% at reception. and in case of hight speed(115,200 bps), the decline of an average 16.67% at transmission, the decline of an average 25.61% at reception.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.12 no.3
• /
• pp.159-167
• /
• 2017

Software safety is a key issue in embedded system of automotive and aviation industries. Various software testing approaches have been proposed to achieve software safety like ISO26262 Part 6 in automotive environment. In spite of one of the classic and basic approaches, stack memory is hard to estimating exactly because of uncertainty of target code generated by compiler and complex nested interrupt. In this paper, we propose an approach of analyzing the maximum stack usage statically from target binary code rather than the source code that also allows nested interrupts for determining the exact stack memory size. In our approach, determining maximum stack usage is divided into three steps: data extraction from ELF file, construction of call graph, and consideration of nested interrupt configurations for determining required stack size from the ISR (Interrupt Service Routine). Experimental results of the estimation of the maximum stack usage shows proposed approach is helpful for optimizing stack memory size and checking the stability of the program in the embedded system that especially supports nested interrupts.

• Transactions of Materials Processing
• /
• v.11 no.2
• /
• pp.179-186
• /
• 2002

In the finite element analysis of metal forming Processes using general Lagrangian formulation, element nodes in the mesh move and elements are distorted as the material is deformed. The excessive degeneracy of mesh interrupts finite element analysis and thus increases the error of plastic deformation energy, In this study, a remeshing scheme using so-called mesh compression method is proposed to effectively analyze the flash which is generated usually in hot forging processes. In order to verify the effectiveness of the method, several examples are tested in two-dimensional and three-dimensional problems.

• Proceedings of the IEEK Conference
• /
• 2008.06a
• /
• pp.603-604
• /
• 2008

This paper implemented The LED illuminance control IP based on 8bit RISC Processor. 8bit RISC Processor designed hardware interrupts, an interface for serial communications, a timer system with compare-capture-reload resources and a watchdog timer. LED Array consists of Red, Green, Blue, White and Warm White. The illuminance control IP is used to LED Board control with 8bit data.

• 제어로봇시스템학회:학술대회논문집
• /
• 2000.10a
• /
• pp.29-29
• /
• 2000

This paper describes the design and implementation of a high-speed navigation computer to achieve precision navigation performance with Strapdown INS. The navigation computer inputs are velocity and angular increment data from the ISA at the signal of the 2404Hz interrupt and performs the removal of gyro block motion and the compensation of high dynamic errors at the 200Hz. For high-speed and high-accuracy, the computer consists of the 68040 micro-processor, 128k Memories, FPGAs, and so on. We show that the computer satisfies the required performance by In-Run navigation tests.

• Proceedings of the KIEE Conference
• /
• 1988.07a
• /
• pp.69-72
• /
• 1988

The work is concerned with the analysis of the voltage escalation caused by the repeated restriking and extinguishing of the current when the vacuum circuit breaker interrupts the arc furnace load current. The paper particularly concentrates on the protective measures that may be adopted to overcome the restriking problem and guidelines are evaluated.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.38C no.1
• /
• pp.57-63
• /
• 2013

This paper suggests a method to implement a gateway model that enables an OPNET simulator to interwork with multiple real systems. In general, for two or more real systems to interwork with a simulator, the real systems need to be connected to a switch to form a link to the simulator. This method, however, is useful only when the models in the simulator represent the real systems that have transceivers and have no mobility. Otherwise, the method is not applicable for interworking of multiple real systems. A method to implement a gateway for the case is presented in the paper. The method includes modules that process packets transmitted via remote interrupts.

• Journal of Institute of Control, Robotics and Systems
• /
• v.9 no.10
• /
• pp.789-797
• /
• 2003

An implementation scheme and some improvements are proposed to adopt public-licensed operating system, Linux and de-facto world-wide network standard, TCP/IP into the field of behavior-based autonomous mobile robots. To demonstrate the needs of scheme and the improvement, an analysis is performed on a server/client communication problem with real time Linux previously proposed, and another analysis is also performed on interactions among TCP/IP communications and the performance of Linux system using them. Implementation of behavior-based control architecture on real time Linux is proposed firstly. Revised task-scheduling schemes are proposed that can enhance the performance of server/client communication among local tasks on a Linux platform. A new method of TCP/IP packet flow handling is proposed that prioritizes TCP/IP software interrupts with aperiodic server mechanism as well. To evaluate the implementation scheme and the proposed improvements, performance enhancements are shown through some simulations.