• Proceedings of the IEEK Conference
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• summer
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• pp.199-203
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• 2004

In this paper, we only describe the digital block of two-channel 18-bit analog-to-digital (A/D) converter employing sigma-delta method and xl28 decimation. The device contains two fourth comb filters with 1-bit input from sigma­delta modulator. each followed by a digital half band FIR(Finite Impulse Response) filters. The external analog sigma-delta modulators are sampled at 6.144MHz and the digital words are output at 48kHz. The fourth-order comb filter has designed 3 types of ways for optimal power consumption and signal-to-noise ratio. The following 3 digital filters are designed with 12tap, 22tap and 116tap to meet the specification. These filters eliminate images of the base band audio signal that exist at multiples of the input sample rate. We also designed these filters with 8bit and 16bit filter coefficient to analysis signal-to-noise ratio and hardware complexity. It also included digital output interface block for I2S serial data protocol, test circuit and internal input vector generator. It is fabricated with 0.35um HYNIX standard CMOS cell library with 3.3V supply voltage and the chip size is 2000um by 2000um. The function and the performance have been verified using Verilog XL logic simulator and Matlab tool.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.4
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• pp.152-161
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• 1996

In tis work, a three-stage pipelined A/D converter (ADC) was implemented to obtain 10-bit resolution at a conversion rate of 20 msamples/s for video applications. The ADC consists of three identical stages employing a mid-rise coding technique. The interstage errors such as offsets and clock feedthrough are digitally corrected in digitral logic by one overlapped bit between stages. The proposed ADC is optimized by adopting a unit-capacitor array architecture in the MDAC to improve the differential nonlinearity and the yield. Reduced power dissipation has been achieve dby using low-power latched comparators. The prototype was fabricated in a 0.8$\mu$m p-well CMOS technology. The ADC dissipates 160 mW at a 20 MHz clock rate with a 5 V single supply voltage and occupies a die area of 7 mm$^{2}$(2.7 mm $\times$ 2.6mm) including bonding pads and stand-alone internal bias circuit. The typical differential and integral nonlinarities of the prototype are less than $\pm$ 0.6 LSB and $\pm$ 1 LSB, respectively.

• 전자공학회논문지 IE
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• v.47 no.3
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• pp.14-18
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• 2010

In this paper, we describe a CMOS DC-DC converter with a variable output voltage(5-7V @100mA) for a portable battery-operated system applications. The proposed DC-DC converter is used along with a Pulse-Frequency Modulation (PFM) method and consists of reference circuit, a feedback resistor, a controller, and an internal oscillator. The integrated DC-DC converter with two external passive components(L,C) has been designed and fabricated on a 0.5um 2-poly 3-metal CMOS process and could be applied to the Personal Digital Assistants(PDA), cellular Phone, Laptop Computer, etc.

• Journal of the Korean Society of Safety
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• v.26 no.6
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• pp.13-19
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• 2011

The purpose of this study is to examine the cause of damage to electrolytic capacitors and to present the heat generation mechanism in order to prevent the occurrence of similar problems. From the analysis results of electrolytic capacitors collected from accident sites, the fire causing area can be limited to the primary power supply for the initial accident. From the tests performed by applying overvoltage, surge, etc., it is thought that the fuse, varistor, etc., are not directly related to the accidents that occurred. The analysis of the characteristics using a switching regulator showed that the charge and discharge characteristics fell short of standard values. In addition, it is thought that heated electrolytic capacitors caused thermal stress to nearby resistances, elements, etc. It can be seen that the heat generation is governed by the over-ripple current, application of AC overvoltage, surge input, internal temperature increase, defective airtightness, etc. Therefore, when designing an electrolytic capacitor, it is necessary to comprehensively consider the correct polarity arrangement, appropriate voltage application, correct connection of equivalent series resistance(ESR) and equivalent series inductance(SEL), rapid charge and discharge control, sufficient margin of dielectric tangent, etc.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.7
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• pp.515-520
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• 2018

A large number of lithium-ion batteries are arranged in series and parallel in battery packs, such as those in electric vehicles or energy storage systems. As battery packs age, their output power and energy density drop because of voltage deviation, constant and non-uniform exposure to abnormal environments, and increased contact resistance between batteries; this reduces application system efficiency. Despite the balancing circuit and logic of the battery management system, the output of the battery pack is concentrated in the most severely aged unit cell and the output is frequently limited by power derating. In this study, we implemented a cell imbalance detection algorithm and selected parameters to detect a sudden decrease in battery pack output. In addition, we propose a method to increase efficiency by applying the measured testing values considering the operating conditions and abnormal conditions of the battery pack.

• Journal of Electrical Engineering and Technology
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• v.13 no.2
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• pp.800-811
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• 2018

This paper presents a regenerative braking control scheme for Switched Reluctance Machine (SRM) drive in Electric Vehicles (EVs). The main purpose is to maximize the recovered energy during battery charging by taking into account the nonlinear physical characteristics of the Switched Reluctance Machine. The proposed regenerative braking method employs the back-EMF in the generation process as a complicated position-dependent voltage source. The proposed maximum power recovery (MPR) operation of the regenerative braking is first based on the maximization of the extracted power from the machine and then the maximization of the power transferred to the battery. The maximum power extraction (MPE) from SRM is based on maximizing the energy conversion ratio by the calculation of the optimum PWM switching duty cycle, turn-on, and turn-off angles. By using the impedance matching theorem that allows the maximum power transfer (MPT) of the MPE, the proposed MPR is achieved. The parametric averaged value modeling of the machine phase currents in the chopping control mode is used for MPR realization. By following this model, a nonlinear equivalent input resistance is derived for the battery internal resistance matching. The effectiveness of the proposed regenerative braking method is demonstrated through simulation results and experimental implementation.

• Journal of the Korean Solar Energy Society
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• v.30 no.6
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• pp.102-107
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• 2010

a-Si solar cell has relatively dominant drift current when compared with crystalline solar cell due to the high internal electric field. Such drift current make an impact on the PV module in the local shading. In this paper, the a-Si PV module output characteristics of shading effects was approached in terms of process condition, because of the different deposition layer of thin film lead to rising the resistance. We suggested design condition to ensure the long-term durability of the module with regard to the degradation factors such as hot spot by analyzing the module specification. The result shows a remarkable difference on module uniformity for each shading position. In addition, the unbalanced power loss due to power mismatch of each module could intensify the degradation.

• Journal of the Korean Magnetics Society
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• v.9 no.1
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• pp.64-70
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• 1999

The inrush current of transformer can flow when the overvoltage caused by surge or external faults is applied. In this paper, an algorithm for the calculation of this inruch current is proposed. The capacitances of windings are precalculated by using 3 dimensional FEM and are appended to circuit of the transformer. And transient characteristics of the transformer are analyzed by axisymmetric FEM which is coupled magnetic field of transformer and circuit of transformer. When a transformer encounters abnormal voltage, using the proposed method, internal magnetic field of transformer, voltages and currents of windings are calculated.

• Smart Structures and Systems
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• v.18 no.2
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• pp.335-354
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• 2016

This contribution presents an extended one-dimensional theory for piezoelectric beam-type structures with non-ideal electrodes. For these types of electrodes the equipotential area condition is not satisfied. The main motivation of our research is originated from passive vibration control: when an elastic structure is covered by several piezoelectric patches that are linked via resistances and inductances, vibrational energy is efficiently dissipated if the electric network is properly designed. Assuming infinitely small piezoelectric patches that are connected by an infinite number of electrical, in particular resistive and inductive elements, one obtains the Telegrapher's equation for the voltage across the piezoelectric transducer. Embedding this outcome into the framework of Bernoulli-Euler, the final equations are coupled to the wave equations for the longitudinal motion of a bar and to the partial differential equations for the lateral motion of the beam. We present results for the wave propagation of a longitudinal bar for several types of electrode properties. The frequency spectra are computed (phase angle, wave number, wave speed), which point out the effect of resistive and inductive electrodes on wave characteristics. Our results show that electrical damping due to the resistivity of the electrodes is different from internal (=strain velocity dependent) or external (=velocity dependent) mechanical damping. Finally, results are presented, when the structure is excited by a harmonic single force, yielding that resistive-inductive electrodes are suitable candidates for passive vibration control that might be of great interest for practical applications in the future.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.4
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• pp.323-330
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• 2005

In order to increase reliability and reduce system cost, this paper studies particularly applicable method for sensorless PM BLDCM drive system. The waveform of the motor internal voltages(or back emf) contains a fundamental and higher order frequency harmonics. Therefore the third harmonic component is extracted from the stator phase voltage. The resulting third harmonic signal keeps a constant phase relationship with the rotor flux for any motor speed and load condition, and is practically free of noise that can be introduced by the inverter switching, making this a robust sensing method. In addition, a simple starting method and a speed estimation approach are also proposed. Some experimental results are Provided to demonstrate the validity of the proposed control method.