• Title/Summary/Keyword: Interface Board

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Automatic function test system for parts mounted PCB (실장 PCB의 기능 검사 자동화)

  • 박종건;임영철;김의선;김태곤;조경훈
    • 제어로봇시스템학회:학술대회논문집
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    • 1993.10a
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    • pp.244-249
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    • 1993
  • This paper proposes a method of automatic function test for parts mounted Printed Circuit Board. For this purpose, we designed a Data Acquisition Equipment, PC interface card and inspection software. The experiment was done for the coffee vending machine and its result was good.

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Adaptive PCIe system for TI C66x DSPs (TI C66x DSP를 위한 적응형 PCIe 시스템)

  • Kim, Minjae;Jin, Hwajong;Ahn, Heungseop;Choi, seungwon
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.15 no.4
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    • pp.31-40
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    • 2019
  • This paper proposes an adaptive PCIe system for TI C66x DSPs. Conventionally, the PCIe system provided by the C66x is a system dependent on the structure in which the primary core writes an application to the DSP memory through the PCIe interface, then activate the secondary core. Due to the dependency between the cores, when developing a project using a PCIe interface, the remaining cores have to be programmed with a concern of the primary core used as the PCIe interface. Therefore, in order to de-couple the connections among the cores, an adaptive PCIe system is proposed, in the paper, in which the cores operate independently compared to the conventional system. Since the core used as the PCIe interface only runs PCIe related operations in the new system, the remaining cores can be fully utilized without concerning the connections with the core for PCIe interface. In order to verify the feasibility of the proposed adaptive PCIe system, the implementations of LTE-A down link, and IEEE 802.11ac are carried out using the evaluation board which includes a TMS320C6670 chip. Altogether, these results support that we demonstrated that the digital signal processing systems with the PCIe Interface can be developed more rapidly by applying the proposed system.

Development of KOMPSAT-2 Vehicle Dynamic Simulator for Attitude Control Subsystem Functional Verification

  • Suk, Byong-Suk;Lyou, Joon
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1465-1469
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    • 2003
  • In general satellite verification process, the AOCS (Attitude & Orbit Control Subsystem) should be verified through several kinds of verification test which can be divided into two major category like FBT (Fixed Bed Test) and polarity test. And each test performed in different levels such as ETB (Electrical Test Bed) and satellite level. The test method of FBT is to simulate satellite dynamics with sensors and actuators supported by necessary environmental models in ETB level. The VDS (Vehicle Dynamic Simulator) try to make the real situation as possible as the on-board processor will undergo after launch. The purpose of FBT test is to verify that attitude control logic function and hardware interface is designed as expected with closed loop simulation. The VDS is one of major equipments for performing FBT and consists of software and hardware parts. The VDS operates in VME environments with target board, several commercial boards and custom boards based on the VxWorks real time operating system. In order to make time synchronization between VDS and satellite on-board processor, high reliable semaphore was implemented to make synchronization with the interrupt signal from on-board processor. In this paper, the real-time operating environment used on VDS equipment is introduced, and the hardware and software configurations of VDS summarized in the systematic point of view. Also, we try to figure out the operational concept of VDS and AOCS verification test method with close-loop simulation.

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Development of a Simulation Training Simulator using KEPS (시뮬레이터 연계용 교육, 훈련 Mimic Board 시스템 개발)

  • Cha, S.T.;Kim, T.K.;Choi, J.H.;Kim, C.K.;Lee, C.K.
    • Proceedings of the KIEE Conference
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    • 2006.07a
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    • pp.68-69
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    • 2006
  • A new type of simulation training system for power system operation is presented in this paper It is based on transmission mimic board, double screen PC, mimic control panel, and real-time digital simulator, KEPS. The operating simulation includes the simulations of the control panel interface and the simulator. The mimic board displays transmission network summary information using a software view of the hardware based mimic board. The symbols, numbers and colors layout exactly match those of the KEPS draft case to provide operators a familiar and effective starting point. This paper describes the development of an innovative training system, utilizing the benefits of 3 dimension visualization s/w and communication-control s/w to create the appropriate operational environment and allow simulation of various power system operations without the restrictions of other training methods. Experiences gained in developing concepts and meeting considerable s/w challenges are outlined, and the potential of the simulator for future operations training discussed.

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Design of a Dingle-chip Multiprocessor with On-chip Learning for Large Scale Neural Network Simulation (대규모 신경망 시뮬레이션을 위한 칩상 학습가능한 단일칩 다중 프로세서의 구현)

  • 김종문;송윤선;김명원
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.2
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    • pp.149-158
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    • 1996
  • In this paper we describe designing and implementing a digital neural chip and a parallel neural machine for simulating large scale neural netsorks. The chip is a single-chip multiprocessor which has four digiral neural processors (DNP-II) of the same architecture. Each DNP-II has program memory and data memory, and the chip operates in MIMD (multi-instruction, multi-data) parallel processor. The DNP-II has the instruction set tailored to neural computation. Which can be sed to effectively simulate various neural network models including on-chip learning. The DNP-II facilitates four-way data-driven communication supporting the extensibility of parallel systems. The parallel neural machine consists of a host computer, processor boards, a buffer board and an interface board. Each processor board consists of 8*8 array of DNP-II(equivalently 2*2 neural chips). Each processor board acn be built including linear array, 2-D mesh and 2-D torus. This flexibility supports efficiency of mapping from neural network models into parallel strucgure. The neural system accomplishes the performance of maximum 40 GCPS(giga connection per second) with 16 processor boards.

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Design and Implementation for Image Monitoring System using Qt/Embedded (QT/임베디드 기반의 화상 감시시스템 설계 몇 구현)

  • 노방현
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.5 no.3
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    • pp.236-240
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    • 2004
  • We have implemented image monitoring system on PXA255 processor based embedded board that is ported QT/Embedded 2.3.7 version. User is able to monitor camera's capture image for widely separated host PC at client PXA255 board target board by ethernet communication method. And we designed PCI interface card that control motor for camera's Pan & Tilt. Bitmap format's images of $320\times{240}$ size are displayed on PXA255 board's TFT-LCD and User is able to monitor wanted position's image by touch screen input method.

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Design of a Rule-Based Solution Based on MFC for Inspection of the Hybrid Electronic Circuit Board (MFC 기반 하이브리드 전자보오드 검사를 위한 규칙기반 솔루션 설계)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.9
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    • pp.531-538
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    • 2005
  • This paper proposes an expert system which is able to enhance the accuracy and productivity by determining the test strategy based on heuristic rules for test of the hybrid electronic circuit board producted massively in production line. The test heuristic rules are obtained from test system designer, test experts and experimental results. The guarding method separating the tested device with circumference circuit of the device is adopted to enhance the accuracy of measurements in the test of analog devices. This guarding method can reduce the error occurring due to the voltage drop in both the signal input line and the measuring line by utilizing heuristic rules considering the device impedance and the parallel impedance. Also, PSA(Parallel Signature Analysis) technique Is applied for test of the digital devices and circuits. In the PSA technique, the real-time test of the high integrated device is possible by minimizing the test time forcing n bit output stream from the tested device to LFSR continuously. It is implemented in Visual C++ computer language for the purpose of the implementation of the inference engine using the dynamic memory allocation technique, the interface with the electronic circuit database and the hardware direct control. Finally, the effectiveness of the builded expert system is proved by simulating the several faults occurring in the mounting process the electronic devices to the surface of PCB for a typical hybrid electronic board and by identifying the results.

A Study on the Implemention of a Mini-MAP Network Interface Module for CIM (CIM을 위한 Mini-MAP 네트워크 접속장치의 구현에 관한 연구)

  • 김현기;이전우;하정현;정하재;채영도
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.10
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    • pp.59-68
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    • 1993
  • This paper describes implemation of 'General-purpose ETRI MAP interface module' (GEM) for Mini-MAP network. GEM operates as a Mini-MAP node in our FA system. To communicate between GEM and programmable devices(PD) such as PLC and CNC, serial communication is used. Application programs of a MiNi-MAP host system control and monitor programmable devices via GEM. GEM is implemented and tested on the basis of the MAP 3.0. TBC in the Nini-MAP board performs the function of the MAC sublayer. The LLC sublayer is implemented according to the specification of Class 3 that includes Type 1 and 3. And the MMS services are designed within the scope of implementation class MAP3. All the softwares are implemented under the real-time multitask OS for real-time application of the Mini-MAP and they are loaded into PROMs at the network board of GEM. We tested the LLC functions to make use of a protocol analyzer for the token-passing protocol. Also the MMS conformance test was carried out by exchanging primitives between GEM and a MMS product that had already passed the conformance test. Therefore GEM is proposed as a network tool of Computer Integrated Manufacturing (CIM) to integrate PDs which don't support MAP functions.

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Construction of the TLD Readout System Using the Personal Computer and Its Characteristics (PC를 이용한 TLD 판독장치의 제작과 특성조사)

  • U, Hong;Kang, Hee-Dong;Kim, Do-Sung
    • Journal of Sensor Science and Technology
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    • v.7 no.5
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    • pp.342-349
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    • 1998
  • A multipurpose TLD readout system for radiation dosimetry and thermoluminescence study is constructed and its characteristics are investigated. The thermoluminescent lights are measured by a PM tube and the current-to-frequency converter. TLDs are heated by platinum heater and the heating rate is linearly varied. Measurement of the glow curve and control of the whole system have been done by a personal computer equipped with an interface board. The automatic gain control can be done by the control software. The lower detection limit of the system is about $10\;{\mu}Gy$ and dose response is linear.

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Method of DNC System Communication for FMS Construction (FMS 구축을 위한 DNC 시스템 통신기법)

  • 이석희;배용환
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.18 no.4
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    • pp.805-815
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    • 1994
  • The development of automatic production systems has a trend toward Computer Integrated Manufacturing System(CIMS) in recent years. In hardware configuration, CIMS are composed of intelligent CAD/CAM work stations, multifunction CNC machining centers including material handling systems. The DNC systems present the key element of automation hierarchy in a FMS. A DNC system is one which connects a number of numerically-controlled machines to a common memory in a digital computer for part program storage with provision for on-demand distribution of part program data to machines using communication in hierarchical structure of central computer, control computer and cell controller. This paper describes the development of Behind-the-Tape-Reader(BTR) type DNC system using CYBER 180-830 as a central computer and IBM PC-386 cell control computer and NC lathe with FANUC 5T NC controller. In this system, the connection between central computer and cell control computer is done via RS-232C serial interface board, and the connection between cell control computer and FANUC 5T controller is done via parallel interface board. The software consists of two module, central computer communication module for NC program downloading and status uploading, NC machine running module for NC operating.