• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.410-413
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• 1998

In this paper, we present the method that improve alarm security system using the electronic circuits added the emergency lamp by our proposed Algorithms. In conventional method the emergency lamp of warning & alarm system didn't work perfectly its performance because of battery with short life. For improving this problem we, using Peripheral Interface Controller IC, designed the circuit added the emergency lamp for an warning & alarm system and for prevention against stopping the electric current, and compared our proposed method with conventional method. By designing the circuit to stop up over charge we can extend life of battery, use for a stoppage of electric current in emergency and according to the lightness around. Therefore we are very convenient and profitable in our life. In the future we will study the method to lower the cost of architecture for practical utilization.

• The Transactions of the Korean Institute of Power Electronics
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• v.3 no.4
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• pp.353-364
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• 1998

This paper presents a systematic approach to the modeling of power electronic circuits with systemlongrightarrowlevel simulation l languages. It is shown that a circuit model reduces to one of four basic types according to input/output conditions. The e elementary models for single series components and shunt components are derived which are integrated to develop a m model of given converter circuit. The constraints imposed on the model development-matching input/output conditions a and avoiding algebraic loop-are discussed in relation to the realization example of a buck converter circuit model. It is s shown that the constraints can always be fullfilled by introducing fictitious interface blocks, which is generalized to the c concept of model transformation.

• Proceedings of the KIEE Conference
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• 2002.11b
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• pp.127-130
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• 2002

Recently, with the increasing use of power semiconductors and microprocessors which are very sensitive to little change of power quality and for coping positively with anticipating power quality disputes between power providers and consumers which are possible to occur by of power market being formed, the power quality problem has gained preponderance among the contemporary research areas. To serve these purposes, the integrated system has been researched and developed for power quality analysis and monitoring, which provides speedy and powerful functions by the growth of computer hardware and information technology. But the advent of fast and lower price hardware make little difference in an application on many systems. As a result, the key issues of constructing power quality monitoring system are in the management of data obtained, accurate algorithms, graphic representation and user-friendly-environment for easy and clear analysis results. So, in this paper it will be introduced that the standard of user-friendly-GUI(Graphic User Interface) and analysis graphic representation for intuitive understanding of results from power quality analysis based on consideration of several systems currently being in use.

• Proceedings of the KIEE Conference
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• 1999.11b
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• pp.110-112
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• 1999

Recently the substation automation is actively researched at each country. Since the substation automation is an integrated system that consist of electrical, electronic and computer technologies, performance evaluation is very important to inspect the developed system's applicable possibility for real power system. Most studies are verified using computer simulation, because it is hard to apply them to real power systems. Therefore development of a substation simulator is necessary for the performance evaluation of many application systems such as operator aid system. This paper introduces a substation simulator. An intelligent fault diagnosis and restorative control expert system is also introduced UDP/IP is applied as a protocol for data transport between expert system and SC(station computer). As to the Graphic User Interface, C++ Language and Visual Basic is used in the Windows NT operating system together with four Pentium II systems.

• Journal of Korean Society for Geospatial Information Science
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• v.13 no.1 s.31
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• pp.71-80
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• 2005

Recently, water quality problems are emerging as important social issues since water quality in rivers and lakes are significantly deteriorated. Thus, an accurate prediction system on reservoir water quality is required, as well as an integrated system which can provide a solution for taking away contaminated materials. This research aims to develop an intelligent decision support system, which uses a GIS enabling management and spatial analysis. The developed system is a prototype that can be applied into real spot. This research area includes the following main subjects; system analysis and design, geometry data collection and database implementation, data acquisition and analysis on reservoir water quality, interface design and development GIS, and development of an expert system for water quality forecasting by WASPS.

• Journal of the Korean Society of Systems Engineering
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• v.2 no.1
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• pp.31-36
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• 2006

Development of launch vehicle needs a large-scale and complicated System Engineering discipline interfacing to small-quantity production with special manufacturing processes. In general, the System Engineering discipline of launch vehicle has its relationship with Production, Operations, Product Assurance and Management disciplines and its internal partitions into the functions of System Engineering Integration & Control, Requirements Engineering, Analysis, Design and Configuration and Verification. As a function of Product Assurance, reliability of launch vehicle plays an significant role in risk management, system safety, flight safety and launch certification through design assurance. Moreover, major functions of systems engineering are integrated by means of reliability in the phases of design and verification. Therefore, derailed identification of system engineering interfaces of reliability, and execution of tasks for reliability assurance is required for successful development of launch vehicle. This paper identifies specific pattern and mechanism of the interfaces between reliability and system engineering.

• Proceedings of the Korean Society for Quality Management Conference
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• 2004.04a
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• pp.114-119
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• 2004

Software verification and validation(V&V) is a means to develop high-quality software and assure safety and reliability for software. Also, we can achieve the desired software quality through systematic V&V activities. The software to be applied safety critical system like nuclear power plants is required to setup the V&V methodology that comply with licensing requirements for nuclear power plants and should be performed V&V activities according to it. In this paper, we classified safety-critical, safety-related and non-safety for software according to safety function to be peformed and define V&V activities to be applied software grade. Also, we defined V&V activities, procedures and documentation for each phase of software development life cycle and showed techniques and management to perform V&V. Finally, we propose the V&V framework to be applied software development of SMART(System-integrated Modular Advanced ReacTor) MMIS (Man-Machine Interface System) and to comply with domestic licensing requirements.

• Journal of the Korea Society of Computer and Information
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• v.12 no.2 s.46
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• pp.243-249
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• 2007

As today's home-network market grows related researches had been increased and with different interfaces of these products of course there is lack of compatibility between these systems. So we need some extensionable managing system which integrates and manages these systems. In this paper, we designed framework that integrates and manages network system and also implemented Home Gateway using JMX on Sensor-network environment. It may manage each target with modulization and through the connection interface we make allowance compatibility and extensionability between existing systems. Through this researches, we implemented the Home-network integrated managing system which can manage and monitor with PDA or RDP(remote desktop PC).

• Korean Journal of Hydrosciences
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• v.2
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• pp.99-113
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• 1991

Integrated irrigation management system (IIMS) that is incorporated with a microcomputer-based decision support system (DSS) has been developed and applied to paddy rice irrigation systems management. The system hardwares consist of field data acquisition units, data transmission units, central data processing units, and printing and displaying units. Ridld data to be collected include incremental rainfall, streamflow and reservoir water levels, and water levels at several irrigation canal sections within an irrigation sidtricts. The softwares are to process field data, real-time forecasting, irrigation control data, and decision variables from data-base and simulation model subsystems. And the user-interface subsystems are incorporated to present the water system operators and managers the results from data and model sugsystems. User-friendly menu with animated graphic modules are adopted to help understand irrigation controls for the district. This paper issues the overal descriptions of DSS as applied to Anjuk irrigation district. The details of major model components for the irrigation controls are presented along with real-time data collection systems. The potentials of DSS have been appraised very practical and promising for better irrigation system operation and management.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.9 no.8
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• pp.3103-3120
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• 2015

This paper presents a single-phase energy metering chip with built-in calibration function to measure electric power quantities. The entire chip consists of an analog front end, a filter block, a computation engine, a calibration engine, and an external interface block. The key design issues are how to reduce the implementation costs of the computation engine from repeatedly used arithmetic operations and how to simplify calibration procedure and reduce calibration time. The proposed energy metering chip simplifies the computation engine using time-division multiplexed arithmetic units. It also provides a simple and fast calibration scheme by using integrated digital calibration functionality. The chip is fabricated with 0.18-μm six-layer metal CMOS process and housed in a 32-pin quad-flat no-leads (QFN) package. It operates at a clock speed of 4096 kHz and consumes 9.84 mW in 3.3 V supply.