• 제목/요약/키워드: Input current

검색결과 3,425건 처리시간 0.026초

Design and Torque Ripple Analysis of Brush-less DC Motor According to Delta Winding Connection

  • Lee, Tae-Yong;Seo, Myung-Ki;Kim, Yong-Jae;Jung, Sang-Yong
    • Journal of Magnetics
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    • 제20권2호
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    • pp.166-175
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    • 2015
  • In this study, we describe the design method of a Brush-less DC (BLDC) motor with delta winding connection. After designing delta winding connection model with the $60^{\circ}$ flat-top region of the Back Electro-Motive Force (BEMF), an ideal current source analysis and a voltage source analysis, with a 6-step control, were conducted primarily employing Finite Element Method. In addition, as a current controller, we considered the Current Regulator with PI controller using Simulink for the comparison of torque characteristics. When the input current is controlled, the switching regions and reference signals are determined by means of the phase BEMF zero-crossing point. In reality, the input current variation depends on the inductance as well as input voltage, and it causes a torque ripple after all. Therefore, each control method considered in this research showed different torque ripple results. Based on the comparison, the causes of the torque ripple have been verified in detail.

1.6[kW]급 단상 ZCS-PWM HPF 승압형 정류기 (The 1.6[kW] Class Single Phase ZCS-PWM High Power Factor Boost Rectifier)

  • 문상필;김승인;윤영태;김영문;이현우;서기영
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 B
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    • pp.1169-1171
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    • 2003
  • This paper presents a 1.6[kW]class single phase high power factor(HPF) pulse width modulation(PWM) boost rectifier featuring soft commutation of the active switches at zero current. It incorporates the most desirable properties of conventional PWM and soft switching resonant techniques. The input current shaping is achieved with average current mode control and continuous inductor current mode. This new PWM converter provides zero current turn on and turn off of the active switches, and it is suitable for high power applications employing insulated gate bipolar transistors(IGBT'S). The principle of operation, the theoretical analysis, a design example, and experimental results from laboratory prototype rated at 1.6[kW] with 400[Vdc] output voltage are presented. The measured efficiency and the power factor were 96.2[%] and 0.99[%], respectively, with an input current Total Harmonic Distortion(THD) equal to 3.94[%], for an input voltage with THD equal to 3.8[%], at rated load.

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VAR 시스템에 의한 3 상 불평형 부하의 무효전력 보상에 관한 연구 (A STUDY ON THE REACTIVE POWER COMPENSATION OF THREE PHASE UNBALANCED LOAD FOR VAR SYSTEM)

  • 정연택;서영수;김영봉;김한수;이봉주
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1989년도 하계종합학술대회 논문집
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    • pp.531-534
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    • 1989
  • In this paper, the way that input voltage and input line current as a control variable is provided as one unit is projected. Till no, have denied with three phase balanced load. But, in that case, total power factor compensation is difficult, for to control each phase at unbalanced load. Therefor, in this paper suggest of the scheme that three phase unbalanced load is controlled by each phase and input total power factor is compensated unit input factor. therefore, in this paper suggest that three phase unbalanced load is controlled and the method in compensation of unit input factor to be attended by unbalanced load. Besides, the object of control is calculating quantity for input voltage and input line current for the point at issuse make to improve of control method at unbalanced load. As a result, control system of each phase could maintain as a unit input total power factor has been state diviation error of 2% with unbalanced load.

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입력 변압기 없는 3상 멀티-펄스 콘버터의 고조파 저감 (Harmonic Reduction of Three Phase Multi-Pulse Converter Circuit without Input Transformer)

  • 박현철;김영민;황종선;김종만
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 춘계학술대회 논문집 센서 박막재료 반도체재료 기술교육
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    • pp.128-131
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    • 2002
  • In this paper, a new method for reducing harmonic in input AC line currents of converter presents, which is the multi-pulse converter circuit without the input transformer. This system can reduce the harmonic like conventional 12-pulse converter. Both the bridge circuits are controlled with the shifted firing angle and connected 2 tap inter-phase reactor. Using 2 tap changing on inter-phase reactor, the input current is controlled with the different two values in order to make the input current waveform 12 pulses.

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아크용접 로보트시스템에서 용융지크기의 뉴로-퍼지 제어 (Neuro-Fuzzy Contro of Weld Pool Size in Arc Welding Robot System (1st Report : Fuzzy Control of Weld Pool Size))

  • 전외식
    • 한국생산제조학회지
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    • 제6권4호
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    • pp.89-95
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    • 1997
  • Welding technique is widely applied to general industry such as pressure vessel for chemical plant, pipe system, heavy industry, and automobile. There are some points which must be considered when robot system is used in welding automation process for productivity improvement. Welding quality is governed by heat input, and this quantity can be different according to shape, property, and thick of material . For desired heat input , weld input parameters such as welding voltage, current, and welding velocity must be determined with those consideration. Until now these parameters have been determined mainly by experience of operator. In this study, the size of welding zone was predicted by fuzzy rules were constructed from the relation between welding variables and weld pool size. Inverse model method which welding control input for welder is determined with optimum voltage and current by fuzzy controller is validatied by computer simulation.

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정전기에 의한 CMOS DRAM 내부 회오의 파괴 Mechanism과 입력 보호 회로의 개선 (ESD damage mechanism of CMOS DRAM internal circuit and improvement of input protection circuit)

  • 이호재;오춘식
    • 전자공학회논문지A
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    • 제31A권12호
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    • pp.64-70
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    • 1994
  • In this paper, we inverstigated how a parricular internal inverter circuit, which is located far from the input protection in CMOS DRAM, can be easily damaged by external ESD stress, while the protection circuit remains intact. It is shown in a mega bit DRAM that the internal circuit can be safe from ESD by simply improving the input protection circuit. An inverter, which consists of a relatively small NMOSFET and a very large PMOSFET, is used to speed up DRAMs, and the small NMOSFET is vulnerable to ESD in case that the discharge current beyond the protection flows through the inverter to Vss or Vcc power lines on chip. This internal circuit damage can not be detected by only measuring input leakage currents, but by comparing the standby and on operating current before and after ESD stressing. It was esperimentally proven that the placement of parasitic bipolar transistor between input pad and power supply is very effective for ESD immunity.

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다중 3상 PWM 정류기의 해석 (The Analysis of The Three Phase Rectifier)

  • 신대호;윤경섭;조정구;권우현
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1995년도 추계학술대회 논문집 학회본부
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    • pp.242-245
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    • 1995
  • In this paper the multiple three rectifiers for the power factor correction are proposed, analyzed and designed. The multiple three phase rectifiers draw sinusoidal ac currents from the ac voltage sources with nearly unity input power factor and operate with PWM making the control circuit simple and system cost low. Outstandingly it reduces the rated power capacity of devices and the input filter size by reducing input current ripples. Moreover design rules can be obtained from input and output current equations. With the proposed rules, input power factor and output power capacity are determined approximately. Finally these design rules are verified with computer simulations.

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A Test Input Sequence for Test Time Reduction of $I_{DDQ}$ Testing

  • Ohnishi, Takahiro;Yotsuyanagi, Hiroyuki;Hashizume, Masaki;Tamesada, Takeomi
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 ITC-CSCC -1
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    • pp.367-370
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    • 2000
  • It is shown that $I_{DDQ}$ testing is very useful for shipping fault-free CMOS ICs. However, test time of $I_{DDQ}$ testing is extremely larger than one of logic testing. In this paper, a new test input sequence generation methodology is proposed to reduce the test time of $I_{DDQ}$ testing. At first, it is Shown that $I_{DDQ}$ test time Will be denominated by charge supply current for load capacitance of gates whose output logic values are changed by test input vector application and the charge current depends on input sequence of test vectors. After that, a test input sequence generation methodology is proposed. The feasibility is checked by some experiments.riments.

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Reduction of Input Current Harmonics for Three Phase PWM Converter Systems under a Distorted Utility Voltage

  • Park, Nae-Chun;Mok, Hyung-Soo;Kim, Sang-Hoon
    • Journal of Power Electronics
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    • 제10권4호
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    • pp.428-433
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    • 2010
  • This paper proposes a harmonics reduction technique for the input currents of three phase PWM converters. The quality of the phase angle information on the utility voltage connected to the PWM converters affects their control performance. Under a distorted utility voltage, the extracted phase angle based on the synchronous reference frame PLL method is distorted. This causes large harmonics in the input currents of a PWM converter. In this paper, a harmonics reduction method that makes the input currents in the PWM converter sinusoidal even under distorted utility conditions is proposed. By the proposed method, without additional hardware, the THD (Total Harmonic Distortion) of the input currents can be readily limited to below 5% which is the harmonic current requirements of IEEE std. 519. Its validity is verified by simulations and experimental results.

축전지 구동 응용을 위한 새로운 승압형 DC/DC 컨버터 (A New Current-Fed Isolated Boost Converter for Battery Powered Applications)

  • 노정욱;한승훈;윤명중
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1999년도 전력전자학술대회 논문집
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    • pp.646-649
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    • 1999
  • A new isolated boost dc to dc convertor suitable for a low input voltage application is proposed. The proposed convertor features the low switch current stresses, the wide input voltage range operation, and the inherent inrush current protection characteristics, essential to design a low to high voltage conversion circuit. A comparative analysis and experimental results are presented to show the validity of the proposed convertor.

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