• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1997년도 하계학술대회 논문집 F
• /
• pp.1999-2001
• /
• 1997

The main two drawbacks of the Sin91e Stage PFC (SS-PFC) converters employing a DCM Boost PFC cell are relatively high voltage stress on the bulk capacitor and the input current harmonic distortion. The high voltage stress on bulk capacitor makes the SS-PFC converter impractical in a universal input application and the input current harmonic distortion lowers power factor. In this paper a selective variable frequency control that reduces the voltage stress on the bulk capacitor and the input current harmonic distortion is proposed. Computer simulation results of the proposed control method are presented.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2008년도 하계학술대회 논문집
• /
• pp.400-402
• /
• 2008

A new interleaved forward converter, adopting series-input parallel-output structure with a common transformer reset circuit, is proposed in this paper. Series-input structure distributes the voltage stress on switches, which makes it suitable for high input voltage application. Paralleling output stage with an interleaving technique enables the circuit handle large output current and reduces filter size. In addition, since two forward converters share one active-clamp circuit for the transformer reset, its primary structure is simplified. All these features make the proposed converter promising for high input voltage applications with high efficiency and simple structure.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1999년도 하계학술대회 논문집 F
• /
• pp.2712-2714
• /
• 1999

The small signal model for input series-output parallel connected converter system employing charge control together with input capacitor voltage feedback loop is developed. From the model developed, the effect of input capacitor voltage feedback loop to the system stability and outer loop compensator design is analyzed. Theoretical results and simulation show that input capacitor voltage feedback loop has no critical effects on the system stability, so the system can be reduced to a equivalent single module for the stability analysis and outer loop compensator design.

• Journal of Power Electronics
• /
• 제10권4호
• /
• pp.428-433
• /
• 2010

This paper proposes a harmonics reduction technique for the input currents of three phase PWM converters. The quality of the phase angle information on the utility voltage connected to the PWM converters affects their control performance. Under a distorted utility voltage, the extracted phase angle based on the synchronous reference frame PLL method is distorted. This causes large harmonics in the input currents of a PWM converter. In this paper, a harmonics reduction method that makes the input currents in the PWM converter sinusoidal even under distorted utility conditions is proposed. By the proposed method, without additional hardware, the THD (Total Harmonic Distortion) of the input currents can be readily limited to below 5% which is the harmonic current requirements of IEEE std. 519. Its validity is verified by simulations and experimental results.

• 대한전자공학회논문지SD
• /
• 제49권4호
• /
• pp.34-42
• /
• 2012

본 논문에서는 무선전력전송 시스템 수신부의 넓은 입력 범위의 CMOS 다중 모드 정류기를 설계하였다. 다중 모드 정류기의 출력전압을 비교기로 감지하고, 스위치를 컨트롤 하여 정류기 모드를 전환한다. 다중 모드 정류기는 입력 전압의 크기에 따라 자동으로 전파 정류기, 1단 전압 체배기, 2단 전압 체배기로 동작한다. 일반적인 전파 정류기는 10 V에서 20 V까지의 입력 AC 전압에 대해 9 V에서 19 V까지의 출력 DC 전압을 생성할 수 있다. 다중 모드 정류기는 전파 정류기 보다 입력 범위를 5 V 향상시켜서 5 V에서 20 V까지의 입력 AC 전압에 대해 출력 DC 전압은 7.5 V에서 19 V까지 생성되는 것을 보여준다. 다중 모드 정류기의 효율은 전파 정류기 모드에서 94%이다. 제안하는 다중 모드 정류기는 0.35${\mu}m$ BCD 공정으로 설계되었고, 면적은 $2500{\mu}m{\times}1750{\mu}m$ 이다.

• Journal of Power Electronics
• /
• 제16권3호
• /
• pp.1226-1235
• /
• 2016

For wearable health monitoring systems, a fundamental problem is the limited space for storing energy, which can be translated into a short operational life. In this paper, a highly efficient active voltage doubling rectifier with a wide input range for micro-piezoelectric energy harvesting systems is proposed. To obtain a higher output voltage, the Dickson charge pump topology is chosen in this design. By replacing the passive diodes with unbalanced-biased comparator-controlled active counterparts, the proposed rectifier minimizes the voltage losses along the conduction path and solves the reverse leakage problem caused by conventional comparator-controlled active diodes. To improve the rectifier input voltage sensitivity and decrease the minimum operational input voltage, two low power common-gate comparators are introduced in the proposed design. To keep the comparator from oscillating, a positive feedback loop formed by the capacitor C is added to it. Based on the SMIC 0.18-μm standard CMOS process, the proposed rectifier is simulated and implemented. The area of the whole chip is 0.91×0.97 mm², while the rectifier core occupies only 13% of this area. The measured results show that the proposed rectifier can operate properly with input amplitudes ranging from 0.2 to 1.0V and with frequencies ranging from 20 to 3000 Hz. The proposed rectifier can achieve a 92.5% power conversion efficiency (PCE) with input amplitudes equal to 0.6 V at 200 Hz. The voltage conversion efficiency (VCE) is around 93% for input amplitudes greater than 0.3 V and load resistances larger than 20kΩ.

• Journal of Power Electronics
• /
• 제10권1호
• /
• pp.9-13
• /
• 2010

This paper proposes an input-series-output-parallel connected ZVS full bridge converter with interleaved control for photovoltaic power conditioning systems (PV PCS). The input-series connection enables a fully modular power-system architecture, where low voltage and standard power modules can be connected in any combination at the input and/or at the output, to realize any given specifications. Further, the input-series connection enables the use of low-voltage MOSFETs that are optimized for a very low RDSON, thus, resulting in lower conduction losses. The system costs decrease due to the reduced current, and the volumes of the output filters due to the interleaving technique. A topology for a photovoltaic (PV) dc/dc converter that can dramatically reduce the power rating and increase the efficiency of a PV system by analyzing the PV module characteristics is proposed. The control scheme, consisting of an output voltage loop, a current loop and input voltage balancing loops, is proposed to achieve input voltage sharing and output current sharing. The total PV system is implemented for a 10-kW PV power conditioning system (PCS). This system has a dc/dc converter with a 3.6-kW power rating. It is only one-third of the total PV PCS power. A 3.6-kW prototype PV dc/dc converter is introduced to experimentally verify the proposed topology. In addition, experimental results show that the proposed topology exhibits good performance.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2011년도 전력전자학술대회
• /
• pp.171-172
• /
• 2011

The paper proposes a close loop control algorithm for Z-source inverter. The algorithm is realized by PWM duty ratio control in order to improve the output voltage to it's desired level. The controller consist of the output voltage PID controller and DC input voltage P controller. Using the DQ coordinate transformation simplify the controller design. The PSIM simulation results verify the validity by means of comparing the system with or without compensation and estimating if the system has output consistency function when ZSI's load and input voltage value changing.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
• /
• 제49권8호
• /
• pp.529-535
• /
• 2000

In this paper, a current control system of a single phase PWM AC/DC converter using a reduced-order Luenberger observer without source voltage sensors is proposed. The sinusoidal input current and unity input power factor are realised based on the estimated source voltage performed by the reduced-order Luenberger observer using actual currents and DC link voltage. The poles of the reduced-order Luenberger observer are placed in the left half plane of s-plane by the pole-placement method in order to acquire the stability of the observer. The magnitude and the phase of the estimated source voltage are used to accomplish the unity power factor. The proposed method is implemented by DSP(Digital Signal Processor). Experimental Results verify that the reduced-order observer estimates the source voltage without the estimation error and the control system accomplishes the unity power factor, and constant DC link voltage.

• 전력전자학회논문지
• /
• 제15권2호
• /
• pp.150-158
• /
• 2010

본 논문은 입력단 전압과 출력단 부하전압의 상대적 크기에 따라 동작모드가 다르게 구성되며, 열전에너지 수확이 가능한 새로운 공진형 DC/DC 컨버터의 동작 특성을 해석한다. 공진형 DC/DC 컨버터는, 직류 입력전원에 연결 되는 LC 공진회로와, 공진회로의 캐패시터 전압이 최대일 때 부하측으로 에너지를 전달하는 펄스형 공진 컨버터로 구성되어있다. 입력단 LC 공진회로의 캐패시터는 전압의 최대값이 입력전압의 최대값의 2배가 되는 Voltage Doubler의 특성을 갖는다. 제안한 컨버터는 공진 캐패시터 전압의 최대값과 부하전압의 상대적 크기에 따라서 승압형 연결, 혼합형 연결, 직접연결의 3가지 동작특성을 가진다. 승압형 연결은 공진 캐패시터 전압의 최대값이 부하전압보다 작은 경우이다. 혼합형 연결은 공진 캐패시터 전압의 최대값이 부하전압보다 큰 경우이며, 스위칭 주기에 직접연결과 승압형 연결이 연속하여 나타난다. 직접연결은 입력단 전압의 크기가 부하전압보다 큰 경우이며, 입력단 에너지가 부하측으로 컨버터의 스위칭 동작 없이 직접 전달된다. 공진형 DC/DC 컨버터 회로의 동작원리를 설명하고, PSPICE 시뮬레이션 및 실험을 통하여 검증하였으며, 열전에너지 수확분야에 활용 가능성을 제시하였다.