• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.2
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• pp.26-36
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• 1999

In this paper, the novel scheme of OAM performance management function is proposed to supply the most of network resources and reliable services by processing data having various QoS(quality of service) in the view of cell loss and cell delay of ATM networks Also, the special fields of OAM cell are defined in order to improve correlate control, operation, and management technique between networks which is required to flexibility and precision control as detecting the performance information of the variable networks periodically. The proposed OAM function, the input/output function of cell, and the interface function of the accessory device which is likely to the memory/CPU are designed to ASIC. The designed chip is carried out the back-end simulation using Verilog-XL simulator of Cadence. In result, it is able to performs an accurate control in $2{\mu}s$.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.681-684
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• 2015

Power amplifier is an essential component for transmitting signals to a remote receiver in wireless communication systems. Power amplifier is a non-linear device in general, and the nonlinear distortion becomes severer as the output power increases. The nonlinearity results in spectral regrowth, which leads to adjacent channel interference, and decreases the transmit signal quality. To linearize power amplifiers, many techniques have been developed so far. Among the techniques, digital pre-distortion is known as the most cost and performance effective technique. However, the linearization performance falls down abruptly when the power amplifier operates in its saturation region. This is because of the severe nonlinearity. To relieve this problem, this paper proposes a new adaptive predistortion technique. The proposed technique controls the adaptive algorithm based on the power amplifier input level. Specifically, for small signals, the adaptive predistortion algorithm works normally. On the contrary, for large signals, the adaptive algorithm stops until small signals occur again. By doing this, wrong coefficient update by severe nonlinearity can be avoided. Computer simulation results show that the proposed method can improve the linearization performance compared with the conventional digital predistortion algorithms.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.8C
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• pp.711-720
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• 2012

In this paper, we introduce the implementation of driver fatigue monitering system and its result. Input video device is selected commercially available web-cam camera. Haar transform is used to face detection and adopted illumination normalization is used for arbitrary illumination conditions. Facial image through illumination normalization is extracted using Haar face features easily. Eye candidate area through illumination normalization can be reduced by anthropometric measurement and eye detection is performed by PCA and Circle Mask mixture model. This methods achieve robust eye detection on arbitrary illumination changing conditions. Drowsiness state is determined by the level on illumination normalize eye images by a simple calculation. Our system alarms and operates seatbelt on vibration through controller area network(CAN) when the driver's doze level is detected. Our algorithm is implemented with low computation complexity and high recognition rate. We achieve 97% of correct detection rate through in-car environment experiments.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.10
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• pp.91-97
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• 2013

In this paper, a current steering 10-bit CMOS D/A converter to drive a NTSC/PAL analog TV is proposed. The proposed D/A converter has a 50MS/s operating speed with a 6+4 segmented type. Further, in order to minimize the device mismatch, a self-calibration bias technique with a fully integrated termination resistance is discussed. The chip has been fabricated with a 3.3V 0.11um 1-poly 6-metal CMOS technology. The effective chip area is $0.35mm^2$ and power consumption is about 88mW. The experimental result of SFDR is 63.1dB, when the input frequency is 1MHz at the 50MHz of sampling frequency.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.3
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• pp.82-88
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• 2015

This paper presents a design of the enable switch circuit, which is consist of discrete device at smart junction box(SJB) board. The Enable switch circuit, which receives ignition signal (IG) for input, sends a drive signal to linear regulator and other elements. The circuit design is carried out in a BCDMOS $0.18{\mu}m$ technology, and the performances are verified through simulations according to AEC-Q100 and ISO 7637-2. Die area of the designed Enable switch circuit is $1.67mm{\times}0.54mm$ in layout, and it is shown that the die can be housed in $3mm{\times}3mm$ HVSON8 package. The designed enable switch circuit is expected to be widely adopted in various automotive SJB's since it can significantly reduce the overall printed circuit board form factor.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.3
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• pp.556-563
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• 2006

We should extract lines and data which consist of the table in order to classify the table region and analyze its structure in document image. But it is difficult to extract lines and data exactly because the lines are cut and their lengths are changed, or characters or noises are merged to the table lines. These problems result from the error of image input device or image reduction. In this paper, we propose the better method of extracting lines and data for table region classification and structure analysis than the previous ones including commercial softwares. The prposed method extracts horizontal and vertical lines which consist of the table by the use of one dimensional median filter. This filter not only eliminates the noises which attach to the line and the lines which are orthogonal to the filtering direction, but also connects the cut line of which the gap is shorter than the length of the filter tap in the process of extracting lines to the filtering direction. Furthermore, texts attached to the line are separated in the process of extracting vertical lines. This is an example of ABSTRACT format.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.12B
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• pp.831-837
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• 2005

Personal general purpose computer(PC) has been evolved from desktop to portable mobile device such as tablet PC and PDA. Technology innovation on semiconductor have made it possible to package a reasonably Powerful Processor and memory subsystem with advanced input/output devices. At last these subsystems are miniaturized into wearable system. Wearable computer has recently gained attention as the post PC in the ubiquitous environment. Wearable computing becomes more and more feasible and receives growing attention throughout industry and the consumer marketplaces. This paper proposed and developed WPS that has multimedia features and network features as a wearable embedded platform. We explain the form, overall architecture, functions and user applications of this WPS. This paper also discusses the form of next generation computer platform with intuitive user interfaces and well designed applications in the future.

• Journal of Welding and Joining
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• v.31 no.5
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• pp.35-40
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• 2013

In this paper, we propose the Tangible Virtual Reality Representation Method to using haptic device and feature to morphology of created bead from Flux Cored Arc Welding. The virtual reality was started to rising for reduce to consumable materials and welding training risk. And, we will expected maximize virtual reality from virtual welding training. In this paper proposed method is get the database to changing the input factor such as work angle, travelling angle, speed, CTWD. And, it is visualization to bead from extract to optimal morphological feature information to using the Neural Network algorithm. The database was building without error to extract data from automatic robot welder. Also, the Neural Network algorithm was set a dataset of the highest accuracy from verification process in many times. The bead was created in virtual reality from extract to morphological feature information. We were implementation to final shape of bead and overlapped in process by time to using bead generation algorithm and calibration algorithm for generate to same bead shape to real database in process of generating bead. The best advantage of virtual welding training, it can be get the many data to training evaluation. In this paper, we were representation bead to similar shape from generated bead to Flux Cored Arc Welding. Therefore, we were reduce the gap to virtual welding training and real welding training. In addition, we were confirmed be able to maximize the performance of education from more effective evaluation system.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.6
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• pp.43-49
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• 2015

In this paper, we propose enhanced wireless power transfer system based on magnetic resonance for portable electronic device charging. Resonators were designed and fabricated for efficiency improvement and miniaturization through electromagnetism simulation using HFSS(High Frequency Structure Simulator). Impedance matching network is employed to minimize reflections that is caused by difference between input impedance and output impedance. Receiver IC that consist of rectifier and Low Drop Out(LDO) regulator were designed and fabricated to reduce power loss. This chip is implemented in $0.35{\mu}m$ BCD technology. A maximum overall efficiency of 73.8% is determined for the system through experimental verification.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.834-837
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• 2015

In this paper, we designed the FPGA hardware-based real-time ECG simulator, which generates an analog ECG signal within the range of 0 to 5 volts and described function. The ECG signal generated by the simulator can be applied to laboratory tests, the medical device, and the calibration study in various ways. ECG signals generated by simulator are obtained with conventional 24bit quantization to generate the signal data, and they are sampled and quantized to 1kHz of the 8-bit resolution when used as actual data. The proposed simulator is implemented using xilix Spartan-3 and data are transmitted through an RS-232 between the PC and the FPGA simulator. The transmitted data are stored in the memory and the stored data are printed out with the analog ECG signal through DAC (0808). It can also control the heart rate (HR) via the two buttons level UP-DOWN. We used existing ECG input rating for the evaluation of the designed system and evaluated differential circuit for obtaining QRS waveform and the output signal. We finally could obtained proper the result.