• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.7
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• pp.618-627
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• 1990

In this paper a new algorithm for separation of contacting subpattern and connective feature extraction of strokes is proposed. This algorithm is able to classification of the type of contacting parts, connective feature extreaction of strokes, separate the phoneme of contacting parts between strokes, classify the character types by feature classification of connecting parts and analysis of connecting attribute. Also, shape normalize into formal patterns and decide on the input pattern from position value of bending feature of this normalized shape and make an recognition experiment by neural network using BEP learining algorithm. This algorithm represents the good achievement ratio by separation of phoneme, classification of character type, connective feature extraction of stroke and recognition experiment.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.2
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• pp.406-412
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• 2006

In this paper, we propose OHT(optimized nough Transform) algorithm for the lane extraction. Input image is changed into 256 gray revel image. Gray level image is separated into background region and road region by using limited horizontal projection value. In separated road area, we apply OHT algorithm. OHT algorithm is characterized as follows. First, the number of candidate pixels is reduced using the outline orientation of the lane. Second, each range of the left and right lane is defined by limited ${\theta}$ Experimental results show that the proposed method is better than Hough Transform.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.1C
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• pp.1-8
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• 2007

LMS(Least Mean Square) algorithm using steepest descent way in adaptive signal processing requires simple equation and is used widely because of the less complexity. But eigenvalues change by width of input signals in time domain, so the rate of convergence becomes low. In this paper, we propose a new fast running FIR filter structure that improves the convergence speed of adaptive signal processing and the same performance as the existing fast wavelet transform algorithm with less computational complexity. The proposed filter structure is applied to wavelet based adaptive algorithm. Simulation results show a better performance than the existing one.

• Journal of Information Processing Systems
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• v.16 no.3
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• pp.588-598
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• 2020

An alternative state estimation filtering algorithm is designed for continuous time systems with noises as well as control input. Two kinds of estimation filters, which have different measurement memory structures, are operated selectively in order to use both filters effectively as needed. Firstly, the estimation filter with infinite memory structure is operated for a certain continuous time system. Secondly, the estimation filter with finite memory structure is operated for temporarily uncertain continuous time system. That is, depending on the presence of uncertainty, one of infinite memory structure and finite memory structure filtered estimates is operated selectively to obtain the valid estimate. A couple of test variables and declaration rule are developed to detect uncertainty presence or uncertainty absence, to operate the suitable one from two kinds of filtered estimates, and to obtain ultimately the valid filtered estimate. Through computer simulations for a continuous time aircraft engine system with different measurement memory lengths and temporary model uncertainties, the proposed state estimation filtering algorithm can work well in temporarily uncertain as well as certain continuous time systems. Moreover, the proposed state estimation filtering algorithm shows remarkable superiority to the infinite memory structure filtering when temporary uncertainties occur in succession.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.10A
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• pp.1604-1612
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• 2000

This paper proposes a simultaneous hardware resource allocation and binding algorithm for VLSI design. The proposed algorithm works on scheduled input graph and simultaneously allocates binds functional units, interconnections and registers by considering interdependency between operations and storage elements in each control step, in order to share registers and interconnections connected to functional units, as much as possible. Also, the register allocation is especially executes the allocation optima us-ing graph coloring techniques. Therefore the overall resource is reduced. This paper shows the effectiveness of the proposed algorithm by comparing experiments to determine number of functional unit in advance or to separate executing allocation and binding of existing system.

• Annual Conference of KIPS
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• 2014.04a
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• pp.87-89
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• 2014

Aho-Corasick (AC) algorithm is a multiple patterns string matching algorithm commonly used in many applications with real-time performance requirements. In this paper, we parallelize the AC algorithm on the Intel's Many Integrated Core (MIC) Architecture, Xeon Phi Coprocessor. We propose a new technique to compress the Deterministic Finite Automaton structure which represents the set of pattern strings again which the input data is inspected for possible matches. The new technique reduces the cache misses and leads to significantly improved performance on Xeon Phi.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.465-468
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• 2009

A frequency in electrical power system changes by the load fluctuation in utility grid, has an influence on a connected generator, and ultimately brings a big trouble in the power system. Therefore, a quick measurement of system frequency and governor control of power system is a very important factor in the reliability and the economic feasibility. In this study, An improve algorithm that measures the power system frequency quickly and accurately is suggested, simulated by using Matlab and programmed using C code through DSP6713 KIT. This algorithm is tested to the arbitrary voltage waveform input. The results show that the suggested algorithm is effective in the accurate and quick frequency measurements.

• Journal of the Korea Society of Computer and Information
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• v.6 no.4
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• pp.154-162
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• 2001

In this paper, we investigate the scheduling algorithm of router system for Internet service based on the qualify-of-service (QoS) level of the input source traffics. We suggest an approprite scheduling algorithm in order to satisfy their QoS requirements for the loss-sensitive traffic and delay-sensitive traffic. For this purpose, we first study the service requirements of the multiplexer in Internet and the definition of QoS based on the ITU-T white recommendations. Second. we suggest a functional architecture of the multiplexer and the scheduling algorithm to satisfy various QoS requirements for Internet service. Finally. the performance measures of interest, namely steady-state packet loss probability and average delay, are discussed by simulation results.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.883-887
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• 2009

This paper presents a statistical analysis of the MSE of adaptation for the MPDSAP (Maximally polyphase decomposed Subband Affine Projection) algorithm for the an autoregressive (AR) inputs with P order. In subband structure, the Affine Projection (AP) algorithm is transformed to the Normalized Least Mean Square (NLMS) algorithm by applying the polyphase decomposition and the noble identity to the adaptive filter. And also, AR input can be pre-whitened by subband filtering with the Orthonormal Analysis Filters(OAF). In the subband structure, the pre-whitening of the AR(P) inputs provides simple and valid approximations for a statistical analysis of the MSE behaviors for the SAP adaptive filter.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.9 no.1
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• pp.115-126
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• 1999

As the processing speed of communication and computer system has been improved, high speed data processing is required to correct error of data. In this paper, decoding algorithm which is applicable to the wireless communication system is proposed and encoder and decoder are designed by using the proposed decoding algorithm. We design the encoder and decoder by using the VHDL(VHSIC Hardware Description Language) and simulate the designed encoder and decoder by using V-system. Designed algorithm is synthesized by using synopsys tools and is made to one chip by means of XILINX XC4010EPC84-4. When 20MHz was used as the input clock, data arrival time was 29.20ns and data require time was 48.70ns.