• Title/Summary/Keyword: Information input algorithm

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Analysis and Detection of Encoder Fault for Vector Controlled Inducton Motor Drives using Power Parity Relations (전력 등가관계를 이용한 벡터제어 유도전동기의 엔코더 고장 해석 및 검출)

  • 류지수;이기상;박태건
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.52 no.6
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    • pp.333-341
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    • 2003
  • In induction motor control systems driven by the indirect vector control scheme, the rotor speed is measured to determine the flux angle which is a key variable in the control algorithm. The most popular way to measure the angular velocity is the use of rotary encoder. Since the errorneous measurement of rotor speed results in incorrect flux angle estimate, the control input generated based on the faulty information should be far from the desired (correct) value and deteriorates the overall control performance. In this paper the effects of encoder fault on motor variables and control performance are analyzed by both theoretical approach and experimental study. A parity equation based on the Power is suggested and applied to detect the incipient fault of encoder.

Character Segmentation in a License Plate Using Histogram Specification based on Anisotropic Soothing Filter (Anisotropic Smoothing Filter 기반 Histogram Specification을 이용한 번호판 문자분할 기법)

  • Jung, Sung-Cheol;Han, Young-Joon;Hahn, Hern-Soo
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.835-836
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    • 2008
  • This paper presents a new method of segmenting characters in a car licence plate which is less influenced by illumination variation. It uses an anisotropic filter to reduce the lighting noise and a histogram specification scheme to obtain the binary image. Anisotropic smoothing filter process the input images, which are acquired under different lighting conditions, so that they may have similar image quality. The enhanced performance of the proposed algorithm has been proved by the experiment.

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Color image enhancement method based on multi-scaled retinex considering chromatic distribution of input image (이미지의 색도 분포를 고려한 다중 Retinex 기반의 칼라 향상 기법)

  • Jang, In-Su;Park, Kee-Hyon;Ha, Yeong-Ho
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.845-846
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    • 2008
  • Multi-scaled retinex algorithm is generally used to enhance the local contrast and remove the illuminant component. However, if the chromatic distribution of an original image is not uniform and dominated by a certain chromaticity, the chromaticity of resulting image depends on the dominant chromaticity of the original image, thereby inducing the color distortion. In this paper, a modified multi-scaled retinex method to reduce the influence of the dominant chromaticity in the image is proposed using a average chromaticity of original image and global illuminant chromaticity. In addition, to compensate saturation, the chroma value of the resulting image is enhanced based on that of the original image in the CIELAB space.

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Application of electronic nose and PLD chip design using pattern recognition method (패턴 인식 기법의 PLD 칩 설계 및 전자코 활용)

  • 장으뜸;정완영
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.297-300
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    • 2002
  • Application of electronic nose and PLD chip design was developed to be used in gas discrimination system for limited kinds of gas. An array of 4 metal oxide gas sensors with different selectivity patterns were used in order to measure gases. BP(Back Propagation) algorithm was designed and implemented on CPLD of two hundred thousand gate level chips by VHDL language for processing input signals from 4 kinds of gas sensors. This module successfully discriminated 4 kinds of gases and displayed the results on LCD and LED. The developed module could be used for various applications in the field of food process control and alcohol judgment.

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Design of serial pipeline SRFFT for OFDM system (OFDM시스템에 적합한 Serial Pipeline 방식의 SRFFT 설계)

  • 정진일;임재형;조용범
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.153-156
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    • 2002
  • FFT/IFFT block is very important module to determine the performance of OFDM system. This block has been implemented using several FFT algorithms such as radix-2, radix-4 etc. However SRFFT algorithm has not been implemented because of the complexity for implementation. This paper proposes a serial-pipeline SRFfT for OFDM system. The serial-pipeline SRFFT is optimized to use a serial input and serial output. We have implemented the SRFFT block using anam 0.25 Um five-metal process. The simulation show that the SRFFT block can operate about 200MHz. This architecture could be adapted to IEEE 802.lla wireless LAN standard.

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Parts-based Feature Extraction of Speech Spectrum Using Non-Negative Matrix Factorization (Non-Negative Matrix Factorization을 이용한 음성 스펙트럼의 부분 특징 추출)

  • 박정원;김창근;허강인
    • Proceedings of the IEEK Conference
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    • 2003.11a
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    • pp.49-52
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    • 2003
  • In this paper, we propose new speech feature parameter using NMf(Non-Negative Matrix Factorization). NMF can represent multi-dimensional data based on effective dimensional reduction through matrix factorization under the non-negativity constraint, and reduced data present parts-based features of input data. In this paper, we verify about usefulness of NMF algorithm for speech feature extraction applying feature parameter that is got using NMF in Mel-scaled filter bank output. According to recognition experiment result, we could confirm that proposal feature parameter is superior in recognition performance than MFCC(mel frequency cepstral coefficient) that is used generally.

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Component-Based VHDL Analyzer for Reuse and Embedment (재사용 및 내장 가능한 구성요소 기반 VHDL 분석기)

  • 박상헌;손영석
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.1015-1018
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    • 2003
  • As increasing the size and complexity of hard-ware and software system, more efficient design methodology has been developed. Especially design-reuse technique enables fast system development via integrating existing hardware and software. For this technique available hardware/software should be prepared as component-based parts, adaptable to various systems. This paper introduces a component-based VHDL analyzer allowing to be embedded in other applications, such as simulator, synthesis tool, or smart editor. VHDL analyzer parses VHDL description input, and performs lexical, syntactic, semantic checking, and finally generates intermediate-form data as the result. VHDL has full-features of object-oriented language such as data abstraction, inheritance, and polymorphism. To support these features special analysis algorithm and intermediate form is required. This paper summarizes practical issues on implementing high-performance/quality VHDL analyzer and provides its solution that is based on the intensive experience of VHDL analyzer development.

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Simulation for the analysis of distortion and electrical characteristics of a two-dimensional BJT (2차원 BJT의 전기적 특성 및 왜곡 해석 시뮬레이션)

  • 이종화;신윤권
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.4
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    • pp.84-92
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    • 1998
  • A program was developed to analyze the electrical characteristics and harmonic distrotion in a two-dimensional silicon BJT. The finite difference equations of the small signal and its second and thired harmonics for basic semiconductor equations are formulated treating the nonlinearity and time dependence with Volterra series and Taylor series. The soluations for three sets of simultaneous equations were obtained sequantially by a decoupled iteration method and each set was solved by a modified Stone's algorithm. Distortion magins and ac parameters such as input impedance and current gains are calculated with frequency and load resistance as parameters. The distortion margin vs. load resistancecurves show cancellation minima when the pahse of output voltage shifts. It is shown that the distortionof small signal characteristics can be reduced by reducing the base width, increasing the emitter stripe length and reducing the collector epitaxial layer doping concentration in the silicon BJT structure. The simulation program called TRADAP can be used for the design and optimization of transistors and circuits as well as for the calculation of small signal and distortion solutions.

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A detailed FPGA routing by 2-D track assignment (이차원 트랙 할당에 의한 FPGA 상세 배선)

  • 이정주;임종석
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.10
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    • pp.8-18
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    • 1997
  • In FPGAs, we may use the property of the routing architecture for their routing compared to the routing in the conventional layout style. Especially, the Xilinx XC4000 series FPGAs have very special routing architecture in which the routing problem is equivalent to the two dimensional track assignment problem. In this paper, we propose a new FPgA detailed routing method by developing a two dimensional trackassigment heuristic algorithm. The proposed routing mehtod accept a global routing result as an input and obtain a detailed routing such that the number of necessary wire segments in each connection block is minimized. For all benchmark circuits tested, our routing methd complete routing results. The number of used tracks are also similar to the results by thedirect routing methods.

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Simulation and Performance Evaluation of a DTMF Digital Receiver (DTMF 디지털 수신기의 시뮬레이션 및 성능 평가)

  • 류근호;양해원
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.4
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    • pp.1-6
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    • 1984
  • An algorithm for the implementation of R2 MFC digital receiver is evaluated using simulated data. The algorithms satisfy the CCITT recommendations. In this paper, our aim is to provide more efficient way of decoding an input in PCM format and detecting the frequency components. The digital signal processor chip (S2811) is suggested to meet these aims Through the software simulation using an Altair 8800b microcomputer, the proposed receiver is shown to have tolerable performance in spite of a given noise, frequency drift, and twist.

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