• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.5
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• pp.815-820
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• 2008

Recently the frequency assignment and the technical specifications of UWB systems for communications are completed. Therefore many UWB systems have been developed. In our country $3.1{\sim}4.8GHz$ and $7.2{\sim}10.2GHz$ are assigned for UWB systems for communications. When we consider RF technologies and the easy implementation of UWB systems, UWB systems used in the low band are more developed than high band systems. In this paper we design and implement a BPF for low band UWB systems by means of considering the easy implementation of UWB systems. The designed and implemented BPFs are low band filter and low band channel filters. The measured results of the low band filter show that the filter has 21.85dB and 17.91dB attenuation at 3.1GHz and 4.8GHz, 1.53GHz of -10dB bandwidth and 2dB of insertion loss. Low band can be divided into 3 channels with 500MHz of the channel bandwidth. The channel filter for channel number 1 has the characteristics of 24.85dB attenuation at 3.1GHz, 0.61GHz of -10dB bandwidth and 1.87dB of insertion loss. The filter for channel 3 in low band has 19.2dB of attenuation at 4.8GHz, 0.49GHz of -10dB bandwidth and 2.49dB of insertion loss.

• IEIE Transactions on Smart Processing and Computing
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• v.6 no.3
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• pp.210-219
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• 2017

This paper proposes a modified min-max algorithm (MMMA) for nonbinary quasi-cyclic low-density parity-check (NB-QC-LDPC) codes and an efficient parallel block-layered decoder architecture corresponding to the algorithm on a graphics processing unit (GPU) platform. The algorithm removes multiplications over the Galois field (GF) in the merger step to reduce decoding latency without any performance loss. The decoding implementation on a GPU for NB-QC-LDPC codes achieves improvements in both flexibility and scalability. To perform the decoding on the GPU, data and memory structures suitable for parallel computing are designed. The implementation results for NB-QC-LDPC codes over GF(32) and GF(64) demonstrate that the parallel block-layered decoding on a GPU accelerates the decoding process to provide a faster decoding runtime, and obtains a higher coding gain under a low $10^{-10}$ bit error rate and low $10^{-7}$ frame error rate, compared to existing methods.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.55-57
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• 2008

Recently, power supplies with low voltage/high current output are widely used, but conventional power supplies have large power loss, and thus the system efficiency is low. However their control technique is complicated and their elements are many. In this paper, Implementation of High Efficiency Soft-switching Flyback Converter is presented. The proposed converter has been implemented to verify the proposed topology with 5V/20A prototype and theoretical operation under various load condition and universal input voltage range.

• Journal of Korea Society of Digital Industry and Information Management
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• v.7 no.3
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• pp.55-61
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• 2011

This paper presents an implementation of Lattice Reduction (LR)-aided detector for Multiple-Input Multiple-Output (MIMO) system using Graphics Processing Unit (GPU). GPU is a parallel processor which has a number of Arithmetic Logic Units (ALUs), thus, it can minimize the operation time of LR algorithm through the parallelization using multiple threads in the GPU. Through the implemented LR-aided detector, we verify that the LR-aided detector operates a lot faster than Maximum Likelihood (ML) detector. The implemented LR-aided detector has been applied to WiMAX system to show the feasibility of its real-time processing. In addition, we demonstrate that the processing time can be reduced at the cost of 3dB SNR loss by limiting the repeating loop in Lenstra-Lenstra-Lovasz (LLL) algorithm which is frequently used in LR-aided detector.

• Journal of Institute of Control, Robotics and Systems
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• v.3 no.6
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• pp.588-593
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• 1997

This paper shows a design and implementation of throttle valve controller for engine dynamometer system using fuzzy logic. Recently, we demanded the excellent measuring equipment so as to improve engine performance. The throttle valve control for engine dynamometer system is a very particular part in the engine control. Since the structure of engine dynamometer system is very complicated and has nonlinear elements which are influenced by disturbance of vibration, heating, cooling, and energy loss so on. In this paper, fuzzy logic control application have been successful in throttle valve control problem for engine dynamometer system in which the conventional control had difficulties dealing with the system. In this study, we propose a method that the control strategy uses Fuzzy Look-up table and normalization and obtained the satisfying result from realized throttle valve controller for engine dynamometer system.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.08a
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• pp.265-268
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• 2000

In this paper, we propose an algorithm, an optimized architecture, and an implementation for an improved performance of image downscaler. The proposed downscaler uses two-dimensional digital filters for horizontal and vertical scalings, respectively. It also improves scaling precisions and decreases the loss of data, compared with the 1/32 scaler 〔1〕. In order to achieve the optimization, the digital filters are implemented by the multiplexer -adder type scheme 〔2〕. The scaler is designed by using the Verilog-HDL. It is synthesized into gates by using the Samsung 0.35 um STD90 TLM library.

• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.281-284
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• 2004

This paper presents the design and implementation of a QoS based enhanced collaboration system in MDO. This is an efficient distributed communication tool between designers. It supports text communication, audio/video communication, file transfer and XML data sending/receiving. Specially, this system supports a dynamic QoS self-adaptation by using the improved direct adjustment algorithm (DAA+). The original direct adjustment algorithm adjusts the transmission rate according to the congestion level of the network, based on the end to end real time transport protocol (RTP), and controls the transmission rate by using the information of loss ratio in real time transport control protocol (RTCP). But the direct adjustment algorithm does not consider when the RTCP packets are lost. We suggest an improved direct adjustment algorithm to solve this problem. We apply our improved direct adjustment algorithm to our of QoS (Quality of Service) [1] based collaboration system and show the improved performance of transmission rate and loss ratio.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.5 no.2 s.10
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• pp.55-60
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• 2006

In this paper, a broadband double balanced mixer is presented using a wideband Marchand balun implementation by vertical coupler. Frequency is selected as $1.0{\sim}3.7GHz$ for RF, $1.14{\sim}3.84GHz$ for LO, and 140 MHz for IF signals. When LO signal with 7 dBm at 2.64 GHz is injected, a conversion loss of 7.5 dB and RF to LO isolation of -45 dB are obtained. Also, an average conversion loss of 9 dB and RF to LO isolation of -25 dB are obtained for frequency band of $1.0{\sim}3.7GHz$.

• Journal of electromagnetic engineering and science
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• v.7 no.1
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• pp.42-46
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• 2007

This paper presents a linear amplitude equalizer developed to secure the linearity of the slope of the amplitude over the frequency band ranging $2\sim18\;GHz$. The circuit model is featured by the resistor placed between each pair of a transmission-line and a stub. The design includes finding the values of resistors and stubs to have the optimal linear slope and return loss performances. The measured data show the acceptable performances of the slope variation and return loss over $2\sim18\;GHz$.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.9
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• pp.40-44
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• 2006

This study investigated a new tuneable bandpass filter based on coplanar waveguide coupled line structure, and using the varactor diode for tuning the center frequency of the filter. The filter was designed by a commercial simulator and had a tuning range of 180[MHz] from 0.95[GHz] to 1.13[GHz]. The filter acceptable values regarding the insertion loss was less than 3[dB] and its return loss greater than 12[dB]. The figure of merit of the implemented tuneable filter increased with the reverse bias voltage up to 14[V] on the varactor diode. The proposed filter has a promising future as it can be used in integration processes and in various materials as substrate.