• The KIPS Transactions:PartA
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• v.11A no.2
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• pp.115-122
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• 2004

In this paper, the multiple-valued adders and multipliers are implemented by current-mode CMOS. First, we implement the 3-valued T-gate and the 4-valued T-gate using current-mode CMOS which have an effective availability of integrated circuit design. Second we implement the circuits to be realized 2-variable 3-valued addition table and multiplication table over finite fields $GF(3^2)$, and 2-variable 4-valued addition table and multiplication table over finite fields $GF(4^2)$ with the multiple-valued T-gates. Finally, these operation circuits are simulated under $1.5\mutextrm{m}$ CMOS standard technology, $15\mutextrm{A}$ unit current, and 3.3V VDD voltage Spice. The simulation results have shown the satisfying current characteristics. The 3-valued adder and multiplier, and the 4-valued adder and multiplier implemented by current-mode CMOS is simple and regular for wire routing and possesses the property of modularity with cell array. Also, since it is expansible for the addition and multiplication of two polynomials in the finite field with very large m, it is suitable for VLSI implementation.

• Proceedings of the Korean Information Science Society Conference
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• 2002.04a
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• pp.154-156
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• 2002

본 논문에서는 실제 자원의 개발 전에도 망 관리 시스템의 개발 및 운용 테스트를 수행하도록 지원하는 실제 자인 시뮬레이터(RRS: Real Resource Simulator)를 위해 확장된 GDMO 문법과 이를 처리하는 I-GDMO 컴파일러를 소개한다. RRS에서는 사용자가 원하는 형태로 실제 자원의 동작을 시뮬레이션 해야 하므로, 기존 GDMO의 패키지 부분에 사용자가 동작 특성을 기술 할 수 있도록 문법을 확장하였다. 또한 I-GDMO 컴파일러는 기존의 GDMO 컴파일러 역할과 RRS의 구성 요소 중 사용자가 정의한 동작 특성을 유지하는 SDT(Simulation Rata Table)의 내용을 초기화하는 역할을 동시에 수행한다.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.176-179
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• 2000

Fault simulation is often necessary to determine the fault coverage of a given test, that is, to find all the faults detected by test. In this paper we implement a deductive fault simulation using counting method. Counting method uses f$\sub$ｉ/ of fault table and Search list to compute set operation. f$\sub$ｉ/ was counted by fault list of input gate. And we propagate fault list from primary inputs toward primary output by comparing with controling sum. It improved performance by reducing search of faults.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.179-182
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• 1999

전력 증폭기의 3차나 5차 비선형성은 인접 통신 채널에 직접적인 영향을 미치므로 선형화 기법을 이용하여 출력단의 혼변조 신호를 감쇄시켜야 한다. 본 논문에서는 전력 증폭기의 입력 신호를 기저대역에서 왜곡시켜 전력 증폭기를 선형화 시키는 디지털 사전 왜곡기를 구현하였다. 측정에 앞서, 모의실험을 통하여 시스템 변수에 따른 선형화기의 성능을 예측하고, 1차원 참조표(look-up table)를 사용한 사전 왜곡기의 측정 결과, 약 9 dB의 ACPR 개선 효과를 얻을 수 있었다.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.422-425
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• 2003

Software reconfigurable radio will give future users a number of benefits like global roaming, multi mode, multi band, and multi standard. It will also offer complete programmability and reconfigurability to both multi mode and multi functional communication terminal and network nodes. This configuration will be implemented by application of different combination of radio configurable software. In this paper, It proposes the algorithm needed for reconfiguration with basic explanation of the software download. A description of an implementation such reconfiguration processes as partial download and full download and critical and non-critical download installation using the registration table in included.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.6
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• pp.447-454
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• 1990

This paper presents definitions of the hardware description language and hardware compiler for the complex digital system design. In this paper, The translator is implemented for generating the table of data subsystems using the register transfer algorithm.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.833-834
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• 2006

In this paper, It is proposed collecting, processing, and learning of data with PIC16F877 and Acode 300[3], constructing database in PC. The PIC16F877 microcontroller nodes are the radio sensor and the DC motor controller. The PC of flexible factory level construct the data-table for object-oriented optimal environment control. The DC Motor control command is decision with back-propagation.

• 한국데이터정보과학회:학술대회논문집
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• 2006.11a
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• pp.9-20
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• 2006

Even though there are lots of learning theory and learning Instruments today, it is still difficult to teach the children individually taking their learning ability into consideration. In this case lower level children may be discouraged and cannot catch up the next course. The purpose of this paper is to design and develop webb-based courseware on arithmetics for the disabled children and apply the program to the class field. This program is very useful for the left-behind children because it enables the repetitive and visible learning.

• Proceedings of the Korean Information Science Society Conference
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• 2003.04a
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• pp.175-177
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• 2003

최근 실시간 운영체제하에서의 특정한 기능을 수행하는 임베디드 시스템의 급속한 발전함에 따라 유, 무선 네트워크 기능뿐만 아니라 PDA(Personal Digital Assistants), 디지털 TV 등에 사용되는 멀티미디어 처리가 가능한 시스템이 필요하게 되었다. 이런 시스템은 효율적인 파일시스템을 필요로 하게 된다. 본 논문에서는 많은 운영체제에서 사용되는 FAT(File Allocation Table) 파일 시스템을 실시간 운영체제와 함께 동작하도록 구현하는 방법을 제시한다.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.662-665
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• 2002

This paper describes a novel converter to implement high-speed binary-to-residue conversion for moduli 2$^{n}$ - 1, 2$^{n}$ , 2$^{n}$ +2$^{\alpha}$/($\alpha$$\in$｛0,1,…,n-1｝) without using look-up table. In our implementation, the high-speed converter can be achieved, because of the modulo addition time is independent of the word length of operands by using the Signed-Digit (SD) adders inside the modulo adders. For a LSI implementation of residue SD number system with ordinary binary system, the proposed binary-to-residue converter is the efficient circuit.cient circuit.