• 제목/요약/키워드: IT Hardware

검색결과 3,862건 처리시간 0.038초

Implementation of Hardware Circuits for Fuzzy Controller Using $\alpha$-Cut Decomposition of fuzzy set

  • Lee, Yo-Seob;Hong, Soon-Ill
    • Journal of Advanced Marine Engineering and Technology
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    • 제28권2호
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    • pp.200-209
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    • 2004
  • The fuzzy control based on $\alpha$-level fuzzy set decomposition. It is known to produce quick response and calculating time of fuzzy inference. This paper derived the embodiment computational algorithm for defuzzification by min-max fuzzy inference and the center of gravity method based on $\alpha$-level fuzzy set decomposition. It is easy to realize the fuzzy controller hardware. based on the calculation formula. In addition. this study proposed a circuit that generates PWM actual signals ranging from fuzzy inference to defuzzification. The fuzzy controller was implemented with mixed analog-digital logic circuit using the computational fuzzy inference algorithm by min-min-max and defuzzification by the center of gravity method. This study confirmed that the fuzzy controller worked satisfactorily when it was applied to the position control of a dc servo system.

차량용 네트워크를 이용한 Brake-by-wire 시스템의 Active hardware redundancy 모듈 운영에 관한 연구 (A Study of Active Hardware Redundancy Module Management for Brake-by-wire using In-vehicle-network)

  • 윤종운;김기웅;김태열;김재구;이석
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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    • pp.111-111
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    • 2000
  • The research of network system, being used to reduce automotive wiring harness, is reaching to the development of by-wire system. It is by-wire system that apply IVN(In-Vehicle-Network) to steering, braking system, and it has the advantage of mass-decreasing, easy to diagnose fault and so on. But until now, many developed device can't satisfied with reliability that system have ever had. So redundancy of each network module, i.e., It is only way to make backup module. This paper researches development of network module and redundancy management of backup module when error occurred for implementation of brake-by-wire system.

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도시철도의 안전운행을 위한 시설물 설치에 관한 연구 (A Study on the Facility Installation for Safety Operation of Urban Transit)

  • 이우등
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 B
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    • pp.1323-1325
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    • 2003
  • In field of Urban transit safely, It must be not only secured vehicle but also every areas like power, signal, communication, track, tunnel, operating facilities. Likewise it is very important not only hardware system like vehicles, facilities but also software system like action of engine driver, duty officer. In other to secure safety of hardware, soft ware, it is very important systemic process. In Korea, Many operating companies neglect to invest in safely and ignore technical development about safety because of management. Safely was considered in subway system and many studies were accomplished about safety in subway system in advanced county like U.K, USA. Hence, in this paper, Conditions and improvement of minimum considerable hardware and software are proposed for safe operation in Urban transit.

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An Efficient Interpolation Hardware Architecture for HEVC Inter-Prediction Decoding

  • Jin, Xianzhe;Ryoo, Kwangki
    • Journal of information and communication convergence engineering
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    • 제11권2호
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    • pp.118-123
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    • 2013
  • This paper proposes an efficient hardware architecture for high efficiency video coding (HEVC), which is the next generation video compression standard. It adopts several new coding techniques to reduce the bit rate by about 50% compared with the previous one. Unlike the previous H.264/AVC 6-tap interpolation filter, in HEVC, a one-dimensional seven-tap and eight-tap filter is adopted for luma interpolation, but it also increases the complexity and gate area in hardware implementation. In this paper, we propose a parallel architecture to boost the interpolation performance, achieving a luma $4{\times}4$ block interpolation in 2-4 cycles. The proposed architecture contains shared operations reducing the gate count increased due to the parallel architecture. This makes the area efficiency better than the previous design, in the best case, with the performance improved by about 75.15%. It is synthesized with the MagnaChip $0.18{\mu}m$ library and can reach the maximum frequency of 200 MHz.

Verilog-HDL을 이용한 다중필드 패킷분류 알고리듬의 설계 검증 (The verification of the hardware implementation of packet classification algorithm on multiple fields by Veriolg-HDL)

  • 홍성표;김준형;최원호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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    • pp.852-855
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    • 2003
  • This paper reports the RFC(Recursive Flow Classification) algorithm that is available on multiple fields. It is easy to be implemented by both software and hardware. For high speed classification of packets, the implementation of RFC is essential by hardware. Hence, in this paper, RFC algorithm is simulated by Verilog-HDL, and it verify the efficiency of the algorithm. The result shows that the algorithm can perform a packet classification within several cycles. It is not only much faster than software implementation but also enough to support OC192c.

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EPLA(Electric Park Lock Actuator) System Safety Design Based on Vehicle Functional Safety Standard ISO 26262

  • Eun-Hye Shin;Hyun-Hee Kim;Kyung-Chang Lee
    • 한국산업융합학회 논문집
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    • 제26권2_1호
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    • pp.239-248
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    • 2023
  • In this paper, we conduct a study on the design that can secure the safety of the EPLA system by performing safety activities based on the ISO 26262 standard for vehicle functional safety. In the case of a company developing a detailed system, it is responsible for verification through hardware design and safety analysis in the overall flow of safety activities, and safety analysis according to the ASIL safety level must be properly performed. At this time, there are cases where the safety goal quantitative metric value suggested by the ISO 26262 standard cannot be satisfied only by the hardware design of the basic function, so it is necessary to design and install the safety mechanism. Based on ISO 26262 safety activities, it is possible to derive an effective design plan through hardware safety analysis.

산업용 비젼 시스템을 위한 체인코더의 제작 (Development of A Hardware Chain Coder for Industrial Vision Systems)

  • 이병일;신유식;임준홍;서일홍;변증남
    • 대한전기학회논문지
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    • 제38권8호
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    • pp.629-639
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    • 1989
  • One of the major issues of the industrial vision systems is lengthy processing time due to bulky data for image coding. To reduce the processing time, a modified chain coding algorithm is proposed in such a way that it is more suitable for hardware implementation. A hardware chain coder is developed and used for learn and recognizing objects by extracting several features. It is shown that the desired vision system is much faster than a typical software based system so that it may be applicable to real-time industrial operations.

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IBM PC VGA용 화상처리 소프트웨어(IMAPRO) (Image Processing Software Package(IMAPRO) for IBM PC VGA)

  • 徐在榮;智光薰
    • 대한원격탐사학회지
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    • 제8권1호
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    • pp.59-69
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    • 1992
  • The IMAPRO sotfware package was mainly focused to provide an algorithm which is capable of displaying various color composite images on IBM PC, VGA(Video Graphic Array) card with no special hardware. It displays the false color images using a low-cost eight-bit place refresh buffer. This produces similar quality to the one obtained from image board with three eight-bit plane. Also, it provides user friendly menu driven method for the user who are not familier with technical knowladge of image processing. It may prove useful for universities, institute and private company where expensive hardware is not available.

하드웨어 기반 모바일 IPv6의 구현 (Hardware-Based Mobile IPv6 Implementation)

  • 김혜란;문주형;김원정;추하늘;지서영;임혜숙
    • 한국통신학회논문지
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    • 제32권1B호
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    • pp.40-52
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    • 2007
  • 모바일 IP는 휴대 단말이 새로운 링크로 이동 중에서도 통신을 지속할 수 있도록 하는 기능을 지원한다. 모바일 IPv6는 인터넷 프로토콜 버전 6에 기초하여 모빌리티 기능을 지원하는 프로토콜로서, 기존의 모바일 IPv4의 기능에 경로 최적화등의 새로운 기능이 추가되었다. 본 논문에서는 단말에 모빌리티를 제공하기 위한 기능들을 하드웨어로 처리하는 하드웨어 기반의 모바일 IPv6 구현에 관하여 다룬다 하드웨어 기반의 모바일 IPv6는 기존의 소프트웨어에 기반한 방식에 비하여, 신속한 이동성을 지원하며, 이동 중에 발생할 수 있는 패킷손실을 최소화 하는 장점이 있다. 또한 CPU가 모빌리티 기능지원 부담에서 벗어나 응용프로그램의 수행에 전념할 수 있도록 함으로서, 전체적인 시스템 성능의 향상을 기대할 수 있다.

실시간 모바일 레이트레이싱 하드웨어를 위한 소프트 쉐도우 생성 기법 (A Soft Shadow Technique for a Real-time Mobile Ray Tracing Hardware)

  • 권혁주;홍덕기;박우찬;이상훈
    • 한국컴퓨터그래픽스학회논문지
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    • 제23권3호
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    • pp.55-64
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    • 2017
  • 본 논문에서는 실시간 모바일 레이트레이싱에서 사실적인 그림자를 생성하기 위한 새로운 그림자 생성 기법을 제시한다. 일반적으로 레이트레이싱에서는 그림자 광선을 샘플링 하여 부드러운 그림자를 생성한다. 지금까지 이런 생성 방법은 처리해야 할 광선의 수를 증가시키기 때문에 성능 저하의 요인이 되어왔다. 제안하는 소프트 쉐도우 생성 기법과 하드웨어 구조는 선택적 그림자 생성과 삼각형 주소 캐싱을 통해 샘플링에 의한 성능 저하를 최소화시킴으로써 이런 문제를 해결하였다. 제안된 하드웨어 구조는 모바일 레이트레이싱 하드웨어에 통합 가능한 수준이며, FPGA상에서 성능 평가 되었다. 평가 결과 제안된 기법의 성능은 4, 8, 그리고 16 샘플에 대해서 이전 기법 대비 평균 40%, 50% 그리고 56% 수준으로 향상 되었으며, 우리는 제안된 하드웨어 구조를 통해 실시간으로 소프트 쉐도우를 생성할 수 있음을 확인하였다.