• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.4
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• pp.51-58
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• 2004

Push-pull structure with balun transformer is presented for load modulation technique which improves the overall efficiency of power amplifier Under the assumption that output impedance of fumed-off amplifier is high, conventional Doherty amplifier is composed of impedance inverter and peaking amplifier, of which operation is controlled by the input power level. In many case, however, impedance of 'off'amplifier is very low due to matching network or parasitic output capacitance. This paper introduces novel load modulation technique which uses low output impedance of 'off'amplifier. Experimental results show that good linearity and efficient!'enhancement of the proposed push-pull structure

• Journal of Magnetics
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• v.18 no.4
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• pp.428-431
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• 2013

We demonstrate that a partial loading of $Ni_{0.5}Zn_{0.5}Fe_2O_4$ (Ni-Zn ferrite) film remarkably improves impedance matching of electrically small $Ba_3Co_2Fe_{24}O_{41}$ ($Co_2Z$) hexaferrite antenna. A 3 ${\mu}m$ thick Ni-Zn ferrite film was deposited on a silicon wafer by the electrophoresis deposition process and post-annealed at $400^{\circ}C$. The fabricated Ni-Zn ferrite film has saturation magnetization of $268emu/cm^3$ and coercivity of 89 Oe. A partial loading of the Ni-Zn ferrite film on the $Co_2Z$ hexaferrite helical antenna increases antenna return loss to 24.7 dB from 9.0 dB of the $Co_2Z$ antenna. Experimental results show that impedance matching and maximum input power transmission to the antenna without additional matching elements can be realized, while keeping almost the same size as the $Co_2Z$ antenna size.

• Journal of the Semiconductor & Display Technology
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• v.17 no.2
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• pp.16-19
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• 2018

The development speed of semiconductor and display device manufacturing technology is growing faster than the development speed of process equipment. So, there is a growing need for process diagnostic technology that can measure process conditions in real time and directly. In this study, a plasma diagnosis was carried out using impedance variation due to the plasma discharge. Variation of the measurement impedance appears as a voltage change at the reference impedance, and the plasma density is calculated using this. The above experiment was conducted by integrating the plasma diagnosis system and the linear atmospheric pressure DBD plasma source. It was confirmed that plasma density varies depending on various parameters (gas flow rate, $Ar/O_2$ mixture ratio, Input power).

• Journal of Power Electronics
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• v.9 no.3
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• pp.418-429
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• 2009

In this paper an optimal damped input filter is designed based on a Genetic Algorithm (GA) for an electrolytic capacitor-less AC-AC converter. Sufficient passive damping and minimum losses in passive damping elements, minimization of the filter output impedance at the filter cut-off frequency, minimization of the DC-link voltage and input current fluctuations, and minimization of the filter costs are the main objectives in the multi-objective optimization of the input filter. The proposed filter has been validated experimentally using an induction motor drive system employing an electrolytic capacitor-less AC-AC converter.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2004.05a
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• pp.492-496
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• 2004

When using a conventional power factor correction circuit, a comparatively huge capacitor is used to boost-up output voltage. It has a large amount of harmonic distortion in the input current waveform. To improve the input current waveform of diode rectifiers, we propose a new operating principle for the power factor correction circuit. Due to the fact that the proposed circuit uses smaller ones and a smaller reactor, the output voltage increases and obtains higher input current waveforms. These are suitable for the harmonics guidelines. The proposed circuit is able to obtain higher power factor and efficiency. Also, it has reduced switching loss and held over-shooting by using an inverter of eliminated dead-time HPWM that has non-linear impedance circuits to make up diodes, capacitance and a reactor. We compared the conventional PWM inverter and proposed HPWM inverters and found that a high input power factor of 97[%] and an efficiency of 98[%] were also obtained.

• 전기의세계
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• v.18 no.5
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• pp.12-19
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• 1969

The sensitivity of transistorized d.c. amplifiers is mainly limited by drift at operating point caused by ambient temperature changes. A chopper-type transistorized amplifier is necessary to obtain a high sensitivity without recourse to drift compensation which requires the adjustment of several balancing controls. A chopper-stabilized system consisting of an electro-mechanical chopper for input and output and a high-gain a.c. amplifier is designed and analyzed. The gain of the a.c. amplifier, expressed as the ratio of voltages, is larger than 80db in the band of 50C/S - 100KC/S. The complete system gives an open-loop gain of 68db at direct current. The offset voltage is 20.mu.V referred in input and the voltage drift at the input is less than 10.mu.V/hr at 25.deg.C. This type of amplifier would be useful for the high-gain transistorized d.c. amplifier for analog computers. Also, due to the high input impedance, it is suitable for amplification of signals from wide range of source impedances.

• BioChip Journal
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• v.12 no.4
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• pp.332-339
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• 2018

The future neuro-prosthetic devices would be required spikes data monitoring through sub-nanoscale transistors that enables to neuroscientists and clinicals for scalable, wireless and implantable applications. This research investigates the spikes monitoring through integrated CNT front-end amplifier for neuro-prosthetic diagnosis. The proposed carbon nanotube-based architecture consists of front-end amplifier (FEA), integrate fire neuron and pseudo resistor technique that observed high electrical performance through neural activity. A pseudo resistor technique ensures large input impedance for integrated FEA by compensating the input leakage current. While carbon nanotube based FEA provides low-voltage operation with directly impacts on the power consumption and also give detector size that demonstrates fidelity of the neural signals. The observed neural activity shows amplitude of spiking in terms of action potential up to $80{\mu}V$ while local field potentials up to 40 mV by using proposed architecture. This fully integrated architecture is implemented in Analog cadence virtuoso using design kit of CNT process. The fabricated chip consumes less power consumption of $2{\mu}W$ under the supply voltage of 0.7 V. The experimental and simulated results of the integrated FEA achieves $60G{\Omega}$ of input impedance and input referred noise of $8.5nv/{\sqrt{Hz}}$ over the wide bandwidth. Moreover, measured gain of the amplifier achieves 75 dB midband from range of 1 KHz to 35 KHz. The proposed research provides refreshing neural recording data through nanotube integrated circuit and which could be beneficial for the next generation neuroscientists.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.5
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• pp.383-388
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• 2018

This paper presents a 1.8 GHz six-port-based impedance modulator using CMOS technology, which can select an arbitrary load impedance with switch control. The proposed 1.8-GHz impedance modulator comprises a Wilkinson power divider, three quadrature hybrid couplers, and four SP3T switches for each load impedance selection. The measured insertion loss of -13 dB and the input/output return losses of >10 dB are achieved in the range of 1.4~2.2 GHz. The low drop output regulator for a stable 3.3 V DC power and the serial peripheral interface(SPI) for an easy digital control are integrated. The chip size, including the pads, is $1.7{\times}1.8mm^2$.

• Proceedings of the Optical Society of Korea Conference
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• 2007.07a
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• pp.147-148
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• 2007

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.8
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• pp.1705-1712
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• 2004

This paper presents a new low-cost RF Built-In Self-Test (BIST) circuit for measuring transducer voltage gain, noise figure and input impedance of 5.25GHz low noise amplifier (LNA). The BIST circuit is designed using 0.18${\mu}{\textrm}{m}$ SiGe technology. The test technique utilizes input impedance matching and output transient voltage measurements. The technique is simple and inexpensive. Total chip size has additional area of about 18% for BIST circuit.