• Title/Summary/Keyword: IEEE802.11b

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Linearity Improvement of Class E Amplifier Using Digital Predistortion (디지털 사전왜곡을 이용한 마이크로파 E급 증폭기의 선형성 개선)

  • Park, Chan-Hyuck;Koo, Kyung-Heon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.3 s.357
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    • pp.92-97
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    • 2007
  • Switching mode amplifiers have been studied widely for use at microwave frequency range, and the class E amplifier which is a type of switching mode amplifier offers very high efficiency approaching 100%. In this paper, 2.4GHz microwave class E amplifier with 66% power added efficiency (PAE) and 17.6dBm output has been linearized for use at wireless LAN transmitter, and digital predistortion technique with look up table is applied. With -3dBm input power of wireless LAN, measured output spectrum can meet the required IEEE 802.11g standard spectrum mask, and the digital predistortion output spectrum has been improved by 5dB of ACPR at 20MHz offset from center frequency.

Design and Fabrication of UWB Antenna Using the SRR for WLAN Band Rejection (SRR을 이용한 WLAN 대역 저지용 UWB 안테나의 설계 및 제작)

  • Jo, Nam-I;Kim, Dang-Oh;Kim, Che-Young;Choi, Dong-Muk
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.9
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    • pp.1014-1020
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    • 2009
  • In this paper, a novel UWB(Ultra Wide-band) antenna with suppressed band of IEEE 802.11a($5.15{\sim}5.825\;GHz$) WLAN was designed and fabricated by using SRR(Split Ring Resonator) with band rejection property. MWS(Micro-wave Studio) of CST company was utilized in the design stage. The antenna was fabricated on a substrate, Rogers 4003, with the thickness of 0.8 mm and relative permittivity of 3.38. The measured result shows that the proposed antenna has a good return loss below -10 dB and group delay below 1nsec over UWB communication band($3.1{\sim}10.6\;GHz$) except WLAN band. It also shows the omni-directional radiation pattern.

Distributed CSMA/CA Medium Access Control for Incomplete Medium Sharing Systems with General Channel Access Constraints (불완전매체공유 환경을 위한 CSMA/CA기반 분산방식 매체접근제어기법)

  • Lee Byoung-Seok;Jeon Byoung-Wook;Choe Jin-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.5B
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    • pp.365-377
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    • 2006
  • We define the incomplete medium sharing system as a multi-channel shared medium communication system where any types of constraints are imposed to the set of channels that may be allocated to any transmitter-receiver node pair. A set of distributed MAC schemes are proposed, all of which are based on the CSMA/CA scheme employed in IEEE 802. 11 WLAN standards. Distributed MAC schemes are proposed in three different forms, which can be differentiated by the number and the location of back-off timers; that is, (1) one timer for all queues destined for different receiver nodes, (2) multiple timers at individual transmission queues, (3) multiple timers for individual channels. Through an extensive set of computer simulations, the performances of the proposed MAC schemes show that the MAC scheme with timers at individual transmission queues outperform the others in terms of throughput and delay for most cases considered. The complexity of the proposed schemes is also compared, and the first scheme obviously turned out to be the simplest, and the complexity of the second and third schemes depends on the number of receiver nodes and the number of channels, respectively.

A 10b 100MS/s 27.2mW $0.8mm^2$ 0.18um CMOS Pipeline ADC with Various Circuit Sharing Schemes (다양한 회로 공유기법을 사용하는 10비트 100MS/s 27.2mW $0.8mm^2$ 0.18um CMOS Pipeline ADC)

  • Yoon, Kun-Yong;Lee, Se-Won;Choi, Min-Ho;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.4
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    • pp.53-63
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    • 2009
  • This work proposes a 10b 100MS/s 27.2mW $0.8mm^2$ 0.18um CMOS ADC for WLAN such as an IEEE 802.11n standard. The proposed ADC employs a three-stage pipeline architecture and minimizes power consumption and chip area by sharing as many circuits as possible. Two multiplying DACs share a single amplifier without MOS switches connected in series while the shared amplifier does not show a conventional memory effect. All three flash ADCs use only one resistor ladder while the second and third flash ADCs share all pre-amps to further reduce power consumption and chip area. The interpolation circuit employed in the flash ADCs halves the required number of pre-amps and an input-output isolated dynamic latch reduces the increased kickback noise caused by the pre-amp sharing. The prototype ADC implemented in a 0.18um n-well 1P6M CMOS process shows the DNL and INL within 0.83LSB and 1.52LSB at 10b, respectively. The ADC measures an SNDR of 52.1dB and an SFDR of 67.6dB at a sampling rate of 100MS/s. The ADC with an active die area of $0.8mm^2$ consumes 27.2mW at 1.8V and 100MS/s.

A MB-OFDM UWB Receive Design and Evaluation Using 4. Parallel Synchronization Architecture (4 병렬 동기 구조를 이용한 MB-OFDM UWB 수신기 설계 및 평가)

  • Shin Cheol-Ho;Choi Sangsung;Lee Hanho;Pack Jeong-Ki
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.11 s.102
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    • pp.1075-1085
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    • 2005
  • The purpose of this paper is to design the architecture for synchronization of MB-OFDM UWB system that is being processed the standardization for Alt-PHY of WPAN(Wireless Personal Area Network) at IEEE802.15.3a and to analyze the implementation loss due to 4 parallel synchronization architecture for design or link margin. First an overview of the MB-OFDM UWB system based on IEEE802.15.3a Alt-PHY standard is described. The effects of non-ideal transmission conditions of the MB-OFDM UWB system including carrier frequency offset and sampling clock offset are analyzed to design a full digital architecture for synchronization. The synchronization architecture using 4-parallel structure is then proposed to consider the VLSI implementation including algorithms for carrier frequency offset and sampling clock offset to minimize the effects of synchronization errors. The overall performance degradation due to the proposed synchronization architecture is simulated to be with maximum 3.08 dB of the ideal receiver in maximum carrier frequency offset and sampling clock offset tolerance fir MB-OFDM UWB system.

Receive Diversity for OFDM Systems with Cochannel Interference (동일 채널 간섭을 고려한 OFDM 시스템의 수신 다이버시티 기법)

  • Seo Bo-Seok
    • Journal of Broadcast Engineering
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    • v.11 no.2 s.31
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    • pp.222-228
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    • 2006
  • In this paper, we propose a receive diversity method for orthogonal frequency division multiplexing (OFDM) systems with cochannel interference. In the method, combining is done in the frequency domain by using the subcarrier based maximum ratio combining (MRC) method. For MRC, we exploit the power of cochannel interference as well as the power of channel noise. The accuracy of the power estimate of interference plus noise is enhanced by averaging the initial estimates over the correlated subchannels where the coherency between the subchannel gains comes from the limited delay spread of the channel. Simulation results show that the proposed method yields 2-3.5dB gain of signal to noise ratio compared to the conventional MRC method and less than 1 dB difference to the ideal case.

A Survey of Intelligent Vehicle Security (지능형 차량 보안 기술 동향)

  • Choi, B.C.;Han, S.W.;Chung, B.H.;Kim, J.N.
    • Electronics and Telecommunications Trends
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    • v.22 no.1 s.103
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    • pp.114-118
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    • 2007
  • 국내외적으로 지능형 차량 및 텔레매틱스/ITS 연구 개발을 통해서 차량에 IT 기술 접목을 위한 노력을 가속화하고 있다. 우리나라의 경우 산업자원부가 미래 10대 전략품목으로 자동차 부분에서 지능형 차량을 선정하였으며, 정보통신부는 u-IT839의 핵심서비스로 텔레매틱스/ITS 서비스를 추진하고 있다. EU는 i2010 Flagship에서 intelligentcar initiative 프로젝트를 통해 지능형 차량 및 보안을 위한 전략 수립과 세부과제를 수행하고 있다. 또한, IEEE 802.11p/P1609(WAVE)와 ISO TC204/WG16CALM에서는 차량 통신 보안 및 서비스에 대해서 고려하고 있다. 현재 지능형 차량과 관련하여서는 다양한 사업 모델이 제시되고 있으며, 자동차 업계의 BM과 이동통신 업계의 AM이 동반 성장하고 있다. 본 기고문은 지능형 차량 및 텔레매틱스/ITS와 관련한 보안 기술 동향을 살펴본다.

CMOS Direct-Conversion RF Front-End Design for 5-GHz WLAN

  • Oh, Nam-Jin
    • Journal of electromagnetic engineering and science
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    • v.8 no.3
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    • pp.114-118
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    • 2008
  • Direct-conversion RF front-end for 5-GHz WLAN is implemented in $0.18-{\mu}m$ CMOS technology. The front-end consists of a low noise amplifier, and low flicker noise down-conversion mixers. For the mixer, an inductor is included to resonate out parasitic tail capacitances in the transconductance stage at the operating frequency, thereby improves the flicker noise performance of the mixer, and the overall noise performance of the front-end. The receiver RF front-end has 6.5 dB noise figure, - 13 dBm input IP3, and voltage conversion gain of 20 dB with the power consumption of 30 mW.

Fabrication of Feedforward Optical Transmitter for WLAN and Design of CMOS Circuit for Integration (피드포워드 보상기법을 이용한 2.4 GHz 대역용 FP-LD 광송신기 제작 및 송신기 집적화를 위한 CMOS 회로 설계)

  • Jang, Jun-Woo;Moon, Yon-Tae;Kim, Do-Kyun;Choi, Young-Wan
    • 한국정보통신설비학회:학술대회논문집
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    • 2007.08a
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    • pp.15-18
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    • 2007
  • RoF 링크 시스템을 적용한 무선 근거리 통신망(IEEE 802.11b/g)의 중심 주파수 대역인 2.4 GHz에서 저가의 Febry-Perot 레이저 다이오드를 이용한 피드포워드 광송신기를 제작 및 측정 하였다. 제작된 피드포워드 광송신기의 측정 결과는 2.4 GHz에서 주신호의 간격이 10 MHz이고 크기가 -4 dBm인 입력 신호에서 피드포워드 보상기법을 적용하기 전보다 3차 상호 변조 왜곡 신호가 22.9 dB 개선되었다. 제작된 피드포워드 광송신기의 전자소자의 사양을 바탕으로 송신기 집적을 위한 RFIC회로(감쇄기, 증폭기)를 0.18 ${\mu}m$ 공정을 이용하여 설계하였다.

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Circular Ring Open-Ended Monopole Antenna with Strip for WLAN Dual-Band Operations

  • Yoon, Joong-Han
    • Journal of information and communication convergence engineering
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    • v.12 no.1
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    • pp.1-7
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    • 2014
  • A novel design of a simple circular ring with open-ended monopole antenna for wireless local area network (WLAN) applications is proposed in this article. The proposed antenna consists of an open-ended circular ring and $50-{\Omega}$ microstrip feed-line. The proposed antenna is capable of generating two separate resonant modes with good impedance-matching conditions. A prototype of the proposed antenna is designed, fabricated, and measured. Acceptable agreement between the measurement and simulation results is achieved. Experimental results show that the proposed antenna has operating bandwidths of 1.99-3.04 GHz and 5.08-6.1 GHz with a return loss of less than -10 dB, covering the required bandwidths of the 2.4/5.2/5.8-GHz WLAN standards. This is a microstrip antenna for IEEE 802.11a/b wireless local area networks applications. Meanwhile, the two-dimensional (2D) radiation patterns and three-dimensional (3D) gain performance of the antenna are also observed and discussed.