• Title/Summary/Keyword: I-V characteristic curve

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Analysis and control of PWM converter for V-I output chracteristic implementation of solar cell (태양전지의 V-I 특성 구현을 위한 PWM 컨버터의 해석 및 제어)

  • Ryu, T.G;Yoo, J.H;Han, J.M;Gho, J.S;Choe, G.H
    • Proceedings of the KIPE Conference
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    • 2001.07a
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    • pp.67-71
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    • 2001
  • In this paper, the virtual implement of solar cell was proposed to solve the problems as reappearance and repetition of some situation in experiment of photovoltaic. To realize the VISC, mathematical model of solar cell for driving converter was studied and the buck converter were compared in viewpoint of tracking error of characteristic curve of solar cell using computer simulation.

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Electrical Properties of p-GaAs Photoelectrode for Solar Energy Conversion (태양광 변환을 위한 p형 GaAs 광전극의 전기적 특성)

  • 윤기현;이정원;강동헌
    • Journal of the Korean Ceramic Society
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    • v.32 no.11
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    • pp.1262-1268
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    • 1995
  • Photoelectrochemical properties of p-GaAs electrode have been investigated. I-V characteristic shows that the cathodic photocurrent is observed at -0.7 V vs. SCE. The photoresponse at near 870~880nm wavelength indicates that the photogenerated carriers contibuted to the observed current. The maximum converson efficiency of 35% is obtained for a Xe lamp light source at 400nm. In C-V relation, capacitance peaks appeared at the frequencies of 100Hz and 300Hz due to the activation of the interfacial states which exist at the energy level corresponding to the one-third of the GaAs band gap. The difference of about 1.1V between flatband potential (Vfb) from the Mott-Schottky method and onset voltage from I-V curve is observed due to the trap of carriers at the interfacial states in the boundary between GaAs and electrolyte. In case of WO3 deposited p-GaAs electrode, higher positive onset current and photocurent density are obtained. This can be explained by the fact that carriers are generated by light penetrated into the WO3 thin flm as well as p-GaAs substrate and then move into the electrolyte effectively.

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Effects of NH3 on the Growth of Oxide Film by Infrared-CVD Method (적외선 CVD 방법을 이용한 산화막 성장에 $NH_3$가 미치는 영향)

  • Lee, Chul-Seung;Chung, Kwan-Soo;Kim, Chul-Ju
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.11
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    • pp.1329-1334
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    • 1988
  • A new method was developed for growing oxidation film by thermal reaction of $NH_3$ and $O_2$. The growth rate increased with the increase of partial pressure of $NH_3$. Optical transparency of the growth film was 12% at the wave number 1100 $cm^{-1}$ compared with 17% by thermal dry oxidation method, and the quality was much better. In C-V characteristic curve, $Q_{OX}$ was almost equal to $Q_{SS}$ and no hysteresis phenomena was observed. n-MOS transistors fabricated with this new method showed $I_D$-$V_{DS}$ characteristics better than thermal dry oxidation method.

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The Study of Electrical Characteristic of ZnO Varistor with Voronoi Network (보로노이 네트워크를 이용한 ZnO 바리스터의 전기적 특성 연구)

  • 황휘동;한세원;강형부
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1997.11a
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    • pp.85-89
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    • 1997
  • A microstructure of realistic ZnO varistor was constructed by Voronoi network and studied cia computer simulation. The grain size and standard deviation was calculated with new method and have good agreement with experimental data. In this network, the grain boundary conditions of three different type are randomly distributed. The three electrical boundary conditions . (1) type A junctions (high nonlinearity); (2) type B junctions (low nonlinearity); (3) type C junctions (linear with low-resistivity) are fitted from the experimental measurement. The electrical properties were studied by varying the boundary type concentration and the disorder parameter d. The shape of I-V characteristic curve of the network is affected by the type concentration and the disorder parameter has an effect on the double inflected region.

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Estimation of Output Power for PV Module with Damaged Bypass Diode using MATLAB (Matlab을 이용한 손상된 바이패스 다이오드가 포함된 PV 모듈의 출력 추정)

  • Shin, Woogyun;Go, Seokhwan;Ju, Youngchul;Chang, Hyosik;Kang, Gihwan
    • Journal of the Korean Solar Energy Society
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    • v.36 no.5
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    • pp.63-71
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    • 2016
  • Installed PV module in field is affected by shading caused by various field environmental factors. Bypass diodes are installed in PV module for preventing a power loss and degradation of PV module by shading. But, Bypass diode is easily damaged by surge voltage and has often initial a defect. This paper propose the electric characteristic variation and the power prediction of PV module with damaged bypass diode. Firstly, the resistance for normal bypass diode and damaged bypass diode of resistance was measured by changing the current. When the current increases, the resistance of normal bypass diode is almost constant but the resistance of damaged bypass diode increases. Next, To estimate power of PV module by damaged bypass diode, the equation for the current is derived using solar cell equivalent circuit. Finally, the derived equation was simulated by using MatLab tools, was verified by comparing experimental data.

A Joining Method between HTS Double Pancake Coils (고온초전도 더블 팬케이크 코일들 사이의 접합 방법)

  • Sohn, Myung-Hwan;Sim, Ki-Deok;Kim, Seok-Ho;Kim, Hae-Jong;Bae, Joon-Han;Lee, Eon-Young;Min, Chi-Hyun;Seong, Ki-Chul
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.55 no.12
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    • pp.633-639
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    • 2006
  • High temperature superconductor (HTS) winding coil is one of the key component in superconducting device fabrication. Double-pancake style coils are widely used for such application. High resistance between pancake coils greatly affects the machine design, operating condition and thus the stability. In order to reduce such resistance, experimentalists are looking for efficient and damage free coil connecting methods. In this respect, here we proposed parallel joining method to connect the coils. This is to do crossly joining with HTS tapes on two parallel HTS tapes. Joint samples between two parallel HTS tapes were prepared by using HTS tapes and current-voltage (I-V) characteristic curves were investigated at liquid nitrogen temperature i.e., 77.3 K. A 20 cm length joint connected between two parallel HTS tapes shows $32.5n{\Omega}$, for currents up to 250 A. A small HTS magnet, having two double pancake sub-coils connected together through new parallel joint method was fabricated and their current-voltage (I-V) characteristic curve was investigated. At 77.3K, critical current(Ic) of 97 A and resistance of $55n{\Omega}$ for currents upto 130 A were measured. At operating current 86 A lower than Ic, Joule heats generated in whole magnet and at joint region between sub-coils were 226 mW and 0.4 mW, respectively. Low Joule heat generation suggests that this joining method may be used to fabricate HTS magnet or windings.

Analysts on the Sealing of Nano Structure MOSFET (나노 구조 MOSFET의 스켈링에 대한 특성 분석)

  • 장광균;정학기;이종인
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.3
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    • pp.573-579
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    • 2001
  • The technology for characteristic analysis of device for high integration is changing rapidly. Therefore to understand characteristics of high -integrated device by computer simulation and fabricate the device having such characteristics became one of very important subjects. As devices become smaller from submicron to nanometer, we have investigated MOSFET built on an epitaxial layer(EPI) of a heavily-doped ground plane by TCAD(Technology Computer Aided Design) to develop optimum device structure. We analyzed and compared the EPI device characteristics such as impact ionization, electric field and I-V curve with those of lightly doped drain(LDD) MOSFET. Also, we presented that TCAD simulator is suitable for device simulation and the scaling theory is suitable at nano structure device.

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A Study on SCR-Based ESD Protection Circuit with PMOS (PMOS가 삽입된 SCR 기반의 ESD 보호 회로에 관한 연구)

  • Kwak, Jae-Chang
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1309-1313
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    • 2019
  • In this paper, the electrical characteristics of Gate grounded NMOS(GGNMOS), Lateral insulated gate bipolar transistor(LIGBT), Silicon Controlled Rectifier(SCR), and Proposed ESD protection device were compared and analyzed. First, the trigger voltage and holding voltage were verified by simulating the I-V characteristic curve for each device. After that, the robustness was confirmed by HBM 4k simulation for each device. As a result of HBM 4k simulation, the maximum temperature of the proposed ESD protection device is lower than that of GGNMOS and GGLIGBT and SCR, which means that the robustness is improved, which means that the ESD protection device is excellent in terms of reliability.

Methodological Consideration on the Prediction of Electrochemical Mechanical Polishing Process Parameters by Monitoring of Electrochemical Characteristics of Copper Surface

  • Seo, Yong-Jin
    • Journal of Electrochemical Science and Technology
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    • v.11 no.4
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    • pp.346-351
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    • 2020
  • The removal characteristics of copper (Cu) from electrochemical surface by voltage-activated reaction were reviewed to assess the applicability of electrochemical-mechanical polishing (ECMP) process in three types of electrolytes, such as HNO3, KNO3 and NaNO3. Electrochemical surface conditions such as active, passive, transient and trans-passive states were monitored from its current-voltage (I-V) characteristic curves obtained by linear sweep voltammetry (LSV) method. In addition, the oxidation and reduction process of the Cu surface by repetitive input of positive and negative voltages were evaluated from the I-V curve obtained using the cyclic voltammetry (CV) method. Finally, the X-ray diffraction (XRD) patterns and energy dispersive spectroscopy (EDS) analyses were used to observe the structural surface states of a Cu electrode. The electrochemical analyses proposed in this study will help to accurately control the material removal rate (MRR) from the actual ECMP process because they are a good methodology for predicting optimal electrochemical process parameters such as current density, operating voltage, and operating time before performing the ECMP process.

Analysis on the Scaling of Nano Structure MOSFET (나노 구조 MOSFET의 스켈링에 대한 특성 분석)

  • 장광균;정학기;이종인
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.05a
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    • pp.311-316
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    • 2001
  • The technology for characteristic analysis of device for high integration is changing rapidly. Therefore to understand characteristics of high-integrated device by computer simulation and fabricate the device having such characteristics became one of very important subjects. At devices become smaller from submicron to nanometer, we have investigated MOSFET built on an epitaxial layer(EPI) of a heavily-doped ground plane, and also newEPI MOSFET for improved structure to weak point of LDD structure by TCAD(Technology Computer Aided Design) to develop optimum device structure. We analyzed and compared the EPI device characteristics such as impart ionization, electric field and I-V curve with those of lightly-doped drain(LDD) MOSFET. Also, we presented that TCAD simulator is suitable for device simulation and the scaling theory is suitable at nano structure device.

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