• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.3
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• pp.276-283
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• 2005

Magnetic tunneling transistor (MTT) device using the amorphous n-type Si semiconductor film for base and collector consisting of the [CoFe/NiFe](free layer) and Si(top layer) multilayers was used to study the spin-dependent hot electron magnetocurrent (MC) and tunneling magnetoresistance (TMR) at room temperature. A large MC of 40.2 % was observed at the emitter-base bias voltage ( $V_{EB}$ ) of 0.62 V. The increasing emitter hot current and transfer ratio ( $I_{C}$/ $I_{E}$) as $V_{EB}$ are mainly due to a rapid increase of the number of conduction band states in the Si collector. However, above the $V_{EB}$ of 0.62 V, the rapid decrease of MC was observed in amorphous Si-based MTT because of hot electron spin-dependent elastic scattering across CoFe/Si interfaces.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.10
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• pp.32-38
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• 2003

This works reports the measurement and analysis results on the hot electron induced device degradation in Gate-All-Around SOI MOSFET's, which were fabricated using commercially available SIMOX material. It is observed that the worst-case condition of the device degradation in nMOSFETs is $V_{GS}$ = $V_{TH}$ due to the higher impact ionization rate when the parasitic bipolar transistor action is activated. It is confirmed that the device degradation is caused by the interface state generation from the extracted degradation rate and the dynamic transconductance measurement. The drain current degradation with the stress gate voltages shows that the device degradation of pMOSFETs is dominantly governed by the trapping of hot electrons, which are generated in drain avalanche hot carrier phenomena.r phenomena.

• Bulletin of the Korean Chemical Society
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• v.35 no.8
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• pp.2505-2511
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• 2014

Indium oxide nanocrystals ($In_2O_3$ NCs) with sizes of 5.5 nm-10 nm were synthesized by hot injection of the mixture precursors, indium acetate and oleic acid, into alcohol solution (1-octadecanol and 1-octadecence mixture). Field emission transmission electron microscopy (FE-TEM), High resolution X-Ray diffraction (X-ray), Nuclear magnetic resonance (NMR), and Fourier transform infrared spectroscopy (FT-IR) were employed to investigate the size, surface molecular structure, and crystallinity of the synthesized $In_2O_3$ NCs. When covered by oleic acid as a capping group, the $In_2O_3$ NCs had a high crystallinity with a cubic structure, demonstrating a narrow size distribution. A high mobility of $2.51cm^2/V{\cdot}s$ and an on/off current ratio of about $1.0{\times}10^3$ were observed with an $In_2O_3$ NCs thin film transistor (TFT) device, where the channel layer of $In_2O_3$ NCs thin films were formed by a solution process of spin coating, cured at a relatively low temperature, $350^{\circ}C$. A size-dependent, non-monotonic trend on electron mobility was distinctly observed: the electron mobility increased from $0.43cm^2/V{\cdot}s$ for NCs with a 5.5 nm diameter to $2.51cm^2/V{\cdot}s$ for NCs with a diameter of 7.1 nm, and then decreased for NCs larger than 7.1 nm. This phenomenon is clearly explained by the combination of a smaller number of hops, a decrease in charging energy, and a decrease in electronic coupling with the increasing NC size, where the crossover diameter is estimated to be 7.1 nm. The decrease in electronic coupling proved to be the decisive factor giving rise to the decrease in the mobility associated with increasing size in the larger NCs above the crossover diameter.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.3
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• pp.147-151
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• 2016

Graphene has a monolayer crystal structure formed with C-atoms and has been used as a base layer of HETs (hot electron transistors). Graphene HETs have exhibited the operation at THz frequencies and higher current on/off ratio than that of Graphene FETs. In this article, we report on the preliminary results of current characteristics from the HETs which are fabricated utilizing highly doped Si collector, graphene base, and 5 nm thin $Al_2O_3$ tunnel layers between the base and Ti emitter. We have observed E-B forward currents are inherited to tunneling through $Al_2O_3$ layers, but have not noticed the Schottky barrier blocking effect on B-C forward current at the base/collector interface. At the common-emitter configuration, under a constant $V_{BE}$ between 0~1.2V, $I_C$ has increased linearly with $V_{CE}$ for $V_{CE}$ < $V_{BE}$ indicating the saturation region. As the $V_{CE}$ increases further, a plateau of $I_C$ vs. $V_{CE}$ has appeared slightly at $V_{CE}{\simeq}V_{BE}$, denoting forward-active region. With further increase of $V_{CE}$, $I_C$ has kept increasing probably due to tunneling through thin Schottky barrier between B/C. Thus the current on/off ration has exhibited to be 50. To improve hot electron effects, we propose the usage of low doped Si substrate, insertion of barrier layer between B/C, or substrates with low electron affinity.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.3
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• pp.169-172
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• 2020

In this paper, the effect of hot carrier injection on an n-bulk fin field-effect transistor (FinFET) is analyzed. The hot carrier injection method is applied to determine the performance change after injection in two ways, channel hot electron (CHE) and drain avalanche hot carrier (DAHC), which have the greatest effect at room temperature. The optimum condition for CHE injection is V_G=V_D, and the optimal condition for DAHC injection can be indirectly confirmed by measuring the peak value of the substrate current. Deterioration by DAHC injection affects not only hot electrons formed by impact ionization, but also hot holes, which has a greater impact on reliability than CHE. Further, we test the amount of drain voltage that can be withstood, and extracted the lifetime of the device. Under CHE injection conditions, the drain voltage was able to maintain a lifetime of more than 10 years at a maximum of 1.25 V, while DAHC was able to achieve a lifetime exceeding 10 years at a 1.05-V drain voltage, which is 0.2 V lower than that of CHE injection conditions.

• Proceedings of the Korean Magnestics Society Conference
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• 2003.06a
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• pp.24-24
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• 2003

Metallic magnetoelectronic devices have studied intensively and extensively for last decade because of the scientific interest as well as great technological importance. Recently, the scientific activity in spintronics field is extending to the hybrid devices using ferromagnetic/semiconductor heterostructures and to new ferromagnetic semiconductor materials for future devices. In case of the hybrid device, conductivity mismatch problem for metal/semiconductor interface will be able to circumvent when the device operates in ballistic regime. In this respect, spin-valve transistor, first reported by Monsma, is based on spin dependent transport of hot electrons rather than electron near the Fermi energy. Although the spin-valve transistor showed large magnetocurrent ratio more than 300%, but low transfer ratio of the order of 10$\^$-5/ prevents the potential applications. In order to enhance the collector current, we have prepared magnetic tunneling transistor (MTT) with single ferromagnetic base on Si(100) collector by magnetron sputtering process. We have changed the resistance of tunneling emitter and the thickness of baser layer in the MTT structure to increase collector current. The high transfer ratio of 10$\^$-4/ range at bias voltage of more than 1.8 V, collector current of near l ${\mu}$A, and magnetocurrent ratio or 55% in Si-based MTT are obtained at 77K. These results suggest a promising candidate for future spintronic applications.

• Transactions on Electrical and Electronic Materials
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• v.12 no.3
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• pp.93-97
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• 2011

In this paper, we discuss design considerations for an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a lateral asymmetric channel (LAC) doping profile. We employed a 0.35 ${\mu}M$ standard complementary MOSFET process for fabrication of the devices. The gates to the LAC doping overlap lengths were 0.5, 1.0, and 1.5 ${\mu}M$. The drain current ($I_{ON}$), transconductance ($g_m$), substrate current ($I_{SUB}$), drain to source leakage current ($I_{OFF}$), and channel-hot-electron (CHE) reliability characteristics were taken into account for optimum device design. The LAC devices with shorter overlap lengths demonstrated improved $I_{ON}$ and $g_m$ characteristics. On the other hand, the LAC devices with longer overlap lengths demonstrated improved CHE degradation and $I_{OFF}$ characteristics.

• Transactions on Electrical and Electronic Materials
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• v.11 no.1
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• pp.15-19
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• 2010

In this paper, we discuss design considerations for an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a lateral asymmetric channel (LAC) doping profile. We employed a $0.35\;{\mu}m$ standard complementary MOSFET process for fabrication of the devices. The gates to the LAC doping overlap lengths were 0.5, 1.0, and $1.5\;{\mu}m$. The drain current ($I_{ON}$), transconductance ($g_m$), substrate current ($i_{SUB}$), drain to source leakage current ($i_{OFF}$), and channel-hot-electron (CHE) reliability characteristics were taken into account for optimum device design. The LAC devices with shorter overlap lengths demonstrated improved $I_{ON}$ and $g_m$ characteristics. On the other hand, the LAC devices with longer overlap lengths demonstrated improved CHE degradation and $I_{OFF}$ characteristics.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.120-131
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• 2007

A comprehensive short channel analytical model has been proposed for High Electron Mobility Transistor (HEMT) to obtain higher cut-off frequency maintaining the reliability of the device. The model has been proposed to consider generalized doping variation in the directions perpendicular to and along the channel. The effect of field plates and different gate-insulator geometry (T-gate, etc) have been considered by dividing the area between gate and the high band gap semiconductor into different regions along the channel having different insulator and metal combinations of different thicknesses and work function with the possibility that metal is in direct contact with the high band gap semiconductor. The variation obtained by gate-insulator geometry and field plates in the field and channel potential can be produced by varying doping concentration, metal work-function and gate-stack structures along the channel. The results so obtained for normal device structure have been compared with previous proposed model and numerical method (finite difference method) to prove the validity of the model.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.33 no.10
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• pp.820-826
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• 2009

The anisotropic phonon conductions with varying Joule heating rate of the silicon film in Silicon-on-Insulator devices are examined using the electron-phonon interaction model. It is found that the phonon heat transfer rate at each boundary of Si-layer has a strong dependence on the heating power rate. And the phonon flow decreases when the temperature gradient has a sharp change within extremely short length scales such as phonon mean free path. Thus the heat generated in the hot spot region is removed primarily by heat conduction through Si-layer at the higher Joule heating level and the phonon nonlocality is mainly attributed to lower group velocity phonons as remarkably dissimilar to the case of electrons in laser heated plasmas. To validate these observations the modified phonon nonlocal model considering complete phonon dispersion relations is introduced as a correct form of the conventional theory. We also reveal that the relation between the phonon heat deposition time from the hot spot region and the relaxation time in Si-layer can be used to estimate the intrinsic thermal resistance in the parallel heat flow direction as Joule heating level varies.