• Journal of the Korean Applied Science and Technology
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• v.34 no.4
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• pp.1017-1024
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• 2017

Carbon thin films were deposited by HiPIMS(High Power Impulse Magnetron Sputtering). The properties and microstructures of carbon thin film were investigated with power, pressure, bias voltage and duty cycle. As the HiPIMS power increased, the deposition thickness increased and the surface tended to be rough. The increase in pressure also tended to make the surface rough, but the deposition thickness was not proportional to the pressure. As the bias voltage increased, the surface roughness became worse, the deposition thickness increased and then decreased from the critical bias voltage. Changes in the duty cycle have caused problems such as arcing, which is affected by the chamber structure and the size of the target. The $sp^2/sp^3$ fractions of thin films were estimated by XPS and it was confirmed that the fraction of thin films made by HiPIMS were larger than the fraction of thin films made by DC sputtering.

• Applied Chemistry for Engineering
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• v.18 no.1
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• pp.24-28
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• 2007

The etching of zinc oxide (ZnO) thin films has been studied using a high density plasma in a $Cl_2/Ar$ gas. The etch characteristics of ZnO thin films were systematically investigated on varying $Cl_2$ concentration, coil rf power, dc-bias voltage, and gas pressure. With increasing $Cl_2$ concentration, the etch rate of ZnO thin film increased, the redeposition around the etched patterns decreased but the sidewall slope of the etched patterns slanted. As the coil rf power and dc-bias voltage increased, the etch rates of ZnO thin films increased and etch profiles of ZnO thin films were improved. With increasing gas pressure, the etch rate of ZnO thin films slightly increased but little change in etch profile was observed. Based on these results, the optimal etching conditions of ZnO thin film were selected. Finally, the etching of ZnO thin films with a high degree of anisotropy of approximately $75^{\circ}{\sim}80^{\circ}$ without the redepositions and residues was successfully achieved at the etching conditions of 20% $Cl_2$ concentration, coil rf power of 1000 W, dc-bias voltage of 400 V, and gas pressure of 5 mTorr.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.639-642
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• 2005

A new dual-slope ramp (DSR) reset waveform is proposed to improve the dark room contrast ratio in AC-PDPs. The proposed reset waveform has two different voltage slopes during a ramp-up period. The first voltage slope is lower than the conventional ramp voltage slope, causing a reduction in the background luminance, whereas the second voltage slope is higher than the conventional ramp voltage slope, causing an increase in the background luminance. Thus, a bias voltage is also applied during the second voltage-slope period to adjust the background luminance and address discharge characteristics. As a result, the proposed dual-slope reset waveform can lower the background luminance, thereby improving the high dark room contrast ratio of an AC-PDP without reducing the address voltage margin

• Nuclear Engineering and Technology
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• v.46 no.3
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• pp.387-394
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• 2014

A Slowing Down Time Spectrometer (SDTS) system is a highly efficient technique for isotopic nuclear material content analysis. SDTS technology has been used to analyze spent nuclear fuel and the pyro-processing of spent fuel. SDTS requires an external neutron source to induce the isotopic fissile fission. A high intensity neutron source is required to ensure a high for a good fissile fission. The electron linear accelerator system was selected to generate proper source neutrons efficiently. As a first step, the electron generator of an 80-keV electron gun was manufactured. In order to produce the high beam power from electron linear accelerator, a proper beam current is required form the electron generator. In this study, the beam current was measured by evaluating the performance of the electron generator. The beam current was determined by five parameters: high voltage at the electron gun, cathode voltage, pulse width, pulse amplitude, and bias voltage at the grid. From the experimental results under optimal conditions, the high voltage was determined to be 80 kV, the pulse width was 500 ns, and the cathode voltage was from 4.2 V to 4.6 V. The beam current was measured as 1.9 A at maximum. These results satisfy the beam current required for the operation of an electron linear accelerator.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.798-800
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• 1998

(Ba,Sr)$TiO_3$ thin films were etched with $Cl_2$/Ar gas mixing ratio in an inductively coupled plasma (ICP) by varying the etching parameter such as f power, do bias voltage, and chamber pressure. The etch rate was $560{\AA}/min$ under Cl_2/(Cl_2+Ar)$ gas mixing ratio of 0.2, rf power of 600 W, do bias voltage of 250 V, and chamber pressure of 5 mTorr, At this time, the selectivity of BST to Pt, $SiO_2$ was respectively 0.52, 0.43. The surface reaction of the etched (Ba,Sr)$TiO_3$ thin films was investigated with X-ray photoelectron spectroscopy (XPS).

• Tribology and Lubricants
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• v.11 no.1
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• pp.37-43
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• 1995

Sputtering parameters such as N$_{2}$ flow percentage and bias voltage in reactive TiN film deposition by RF magnetron sputtering system were selected to investigate the effects of sputtering deposition conditions on tribological characteristics of TiN films. Wear scar of the steel ball damaged by TiN films was measured by SEM to understand wear behavior of deposited TiN films. Crystallization and induced strain of TiN were detected by XRD. Wear mode changed from plastic to brittle with increasing N$_{2}$ ratio. Wear scar by sliding with TiN film deposited at around 27% N$_{2}$ ratio was maximum. The results indicate that bias voltage affects tribological behavior by formation of high density film and internal stress.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.1
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• pp.65-70
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• 2001

This paper presents a Receiver MMIC for the CDMA terminal. The complete circuit is composed of Low Noise Amplifier, Down Conversion Mixer, Intermediate Frequency Amplifier and Bias circuit. The Bias circuit implementation, which allows for compensation for threshold voltage and power supply voltage variation are provided. The proposed topology has high linearity and low noise characteristics. Results of the designed circuit are as follows: Overall conversion gain is 28.5 dB, input IP3 of LNA is 8 dBm, input IP3 of down conversion mixer is 0 dBm and total DC current consumption is 22.1 mA.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.9
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• pp.818-824
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• 2008

The Separated Pulsed Laser Deposition (SPLD) technique uses two chambers that are separated by a conic metallic wall with a central orifice. The pressures of ablation chamber and deposition chamber were controlled by the differential vacuum system. We deposited zinc oxide (ZnO) thin films by SPLD method to obtain high quality thin films. When the bias voltage of +500 V was applied between a substrate and an orifice, the ZnO thin film was deposited efficiently. The deposited ZnO thin film at ablation chamber gas pressure of Ar 5 mTorr showed the sharpest ultraviolet absorption edge indicatory the band gap of about 3.1 eV. ZnO thin films were deposited using effect of electric and magnetic fields in the SPLD method. E${\times}$B drift happened by an electric fields and a magnetic fields, activated plasma plume, as a result the film surface became very smooth. When the bias voltage of +500 V and magnet of 0,1 T were applied the ZnO thin films surface state showed high quality. Grain size was 41.99 nm and RMS was 0.84 nm.

• Journal of Electrical Engineering and Technology
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• v.6 no.4
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• pp.505-512
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• 2011

A novel passive boost power converter forsingle-phaseswitched reluctance motor is presented. A simple passive circuit is proposed comprisingthree diodes and one capacitor. The passive circuitis added in the front-end of a conventional asymmetric converter to obtain high negative bias. Based on this passive network, the terminal voltage of the converter side is a general DC-link voltage level in parallel mode up to a double DC-link voltage level in series mode. Thus,it can suppress the negative torque generation from the tail current and improve the output power. The results of the comparative simulation and experiments forthe conventional and proposed converter verify the performance of the proposed converter.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1877-1880
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• 2005

This paper proposed the new current feed-back amplifier for low supply voltage application. The input stage was designed to be a class-AB circuit and achieve the low supply-voltage operation down to $2V_{TH}+2V_{DS(SAT)}$. With the self-adjust bias current, the high performance can be adopted with high stability. The circuit was successfully proven by the simulation with MOSIS 0.5 ${\mu}$m MOS technology.