• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.310-311
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• 2009

New X-shaped crystalline molecules have been synthesized through various coupling reactions and their electronic properties were investigated. They exhibit good solubility in common organic solvents and good self-film forming properties. They are intrinsically crystalline as they exhibit well-defined X-ray diffraction patterns from uniform and preferred orientations of molecules. They also exhibited high field effect mobilities in thin film transistor (TFT) and good device performances.

• International journal of advanced smart convergence
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• v.1 no.1
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• pp.61-64
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• 2012

The ultraviolet and visible light responsive properties of the amorphous indium gallium zinc oxide thin film transistor have been investigated. Amorphous indium gallium zinc oxide (a-IGZO) thin film transistor operate in the enhancement mode with saturation mobility of $6.99cm^2/Vs$, threshold voltage of 13.5 V, subthreshold slope of 1.58 V/dec and an on/off current ratio of $2.45{\times}10^8$. The transistor was subsequently characterized in respect of visible light and UV illuminations in order to investigate its potential for possible use as a detector. The performance of the transistor is indicates a high-photosensitivity in the off-state with a ratio of photocurrent to dark current of $5.74{\times}10^2$. The obtained results reveal that the amorphous indium gallium zinc oxide thin film transistor can be used to fabricate UV photodetector operating in the 366 nm.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.504-505
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• 2005

In this report, we demonstrate a high performance polymer thin-film transistor fabricated on a paper substrate. As a water barrier layer, parylene was coated on the paper substrate by using vacuum deposition process. Using poly (3-hexylthiophene) as an active layer, a polymer thin-film transistor with field-effect of up to 0.086 $cm^2/V{\cdot}s$ and on/off ratio of $10^4$ was achieved. The fabrication of polymer thin-film transistor built on a cheap paper substrate is expected to open a channel for future applications in flexible and disposable electronics with extremely low-cost.

• Journal of Sensor Science and Technology
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• v.27 no.3
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• pp.182-185
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• 2018

Zinc oxide (ZnO) thin films have the advantages of growing at a low temperature and obtaining high charge mobility (carrier mobility) [1]. Furthermore, the zinc oxide thin film can be used to control application resistance depending on its oxygen content. ZnO has the desired physical properties, a transparent nature, with a flexible display that makes it ideal for use as a thin-film transistor. Though these transparent flexible thin-film transistors can be manufactured in various manners, manufacturing large-area transistors using a solution process is easier owing to the low cost and flexible substrate. The advantage of being able to process at low temperatures has been attracting attention as a preferred method. However, in the case of a thin-film transistor fabricated through a solution process, it is reported that charge mobility is lower. To improve upon this, a method of improving the crystallinity through heat treatment and increasing electron mobility has been reported. However, as the heat treatment temperature is relatively high at $500^{\circ}C$, an application where a flexible substrate is absent would be more suitable.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.375-375
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• 2014

Layered semiconductor materials can be a promising candidate for large-area thin film transistors (TFTs) due to their relatively high mobility, low-power switching, mechanically flexibility, optically transparency, and amenability to a low-cost, large-area growth technique like thermal chemical vapor deposition (CVD). Unlike 2D graphene, series of transition metal dichalcogenides (TMDCs), $MX_2$ (M=Ta, Mo, W, X=S, Se, Te), have a finite bandgap (1~2 eV), which makes them highly attractive for electronics switching devices. Recently, 2D $MoS_2$ materials can be expected as next generation high-mobility thin-film transistors for OLED and LCD backplane. In this paper, we investigate in detail the electrical characteristics of 2D layered $MoS_2$ local bottom-gated transistor with the same device structure of the conventional thin film transistor, and expect the feasibility of display application.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.374-377
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• 2009

The characteristics of the deposited thin films of the zinc oxide (ZnO) at different oxygen pressures will be elucidated in this work. The resistivity of ZnO thin films were dominated by the carrier concentration under high oxygen pressure conditions while controlled by the carrier mobility at low oxygen ambiences. In addition, we will show the characteristics of the transparent ZnO based thin film transistor (TFT) fabricated at a full room temperature process with gate dielectric of gadolinium oxide ($Gd_2O_3$) thin films.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1349_1350
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• 2009

Thin films of pp(ST-Co-VA) were fabricated by plasma deposition polymerization (PVDPM) technique. Properties of the plasma polymerized pp(ST-Co-VA) thin films were investigated for application to semiconductor device as insulator. Thickness, dielectric property, composition of the pp(ST-Co-VA) thin films were investigated considering the relationship with preparation condition such as gas pressure and deposition time. In order to verify the possibility of application to organic thin film transistor, a pentacene thin film was deposited on the pp(ST-Co-VA) insulator by vacuum thermal evaporation technique. Crystalline property of the pentacene thin film was investigated by XRD and SEM, FT-IR. Surface properties at the pp(ST-Co-VA)/pentacene interface was investigated by contact angle measurement. The pp(ST-Co-VA) thin film showed a high-k (k=4.6) and good interface characteristic with pentacene semiconducting layer, which indicates that it would be a promising material for organic thin film transistor (OTFT) application.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.118-118
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• 2011

The Nano-Floating Gate Memory(NFGM) devices with ZnO:Cu thin film embedded in Al2O3 and AlOx-SAOL were fabricated and the electrical characteristics were evaluated. To further improve the scaling and to increase the program/erase speed, the high-k dielectric with a large barrier height such as Al2O3 can also act alternatively as a blocking layer for high-speed flash memory device application. The Al2O3 layer and AlOx-SAOL were deposited by MLD system and ZnO:Cu films were deposited by ALD system. The tunneling layer which is consisted of AlOx-SAOL were sequentially deposited at $100^{\circ}C$. The floating gate is consisted of ZnO films, which are doped with copper. The floating gate of ZnO:Cu films was used for charge trap. The same as tunneling layer, floating gate were sequentially deposited at $100^{\circ}C$. By using ALD process, we could control the proportion of Cu doping in charge trap layer and observe the memory characteristic of Cu doping ratio. Also, we could control and observe the memory property which is followed by tunneling layer thickness. The thickness of ZnO:Cu films was measured by Transmission Electron Microscopy. XPS analysis was performed to determine the composition of the ZnO:Cu film deposited by ALD process. A significant threshold voltage shift of fabricated floating gate memory devices was obtained due to the charging effects of ZnO:Cu films and the memory windows was about 13V. The feasibility of ZnO:Cu films deposited between Al2O3 and AlOx-SAOL for NFGM device application was also showed. We applied our ZnO:Cu memory to thin film transistor and evaluate the electrical property. The structure of our memory thin film transistor is consisted of all organic-inorganic hybrid structure. Then, we expect that our film could be applied to high-performance flexible device.----못찾겠음......

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.364-369
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• 2011

Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by $7.1{\times}10^1$. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.359-363
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• 2011

To integrate the sensor driver and logic circuits, fabricating down scaled transistors has been main issue. At this research, short channel effects were analyzed after n channel polycrystalline silicon thin film transistor was fabricated at high temperature. As a result, on current, on/off current ratio and transconductance were increased but threshold voltage, electron mobility and s-slope were reduced with a decrease of channel length. When carriers that develop at grain boundary in activated polycrystalline silicon have no gate biased, on current was increased with punch through by drain current. Also, due to BJT effect (parallel bipolar effect) that developed under region of channel by increase of gate voltage on current was rapidly increased.