• Title/Summary/Keyword: High-Speed implementation

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Design and Implementation of Wi-Fi based Drone to Save People in Maritime (해상 인명구조를 위한 무선랜기반 드론 설계 및 구현)

  • Kim, Dong Hyun;Shin, Jae Ho;Kim, Jong Deok
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.1
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    • pp.53-60
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    • 2017
  • This paper is to design and implement the drone that supports a wideband multimedia communication and a long-range to save people in maritime. The drone is an Unnamed Aerial Vehicle (UAV) that is controlled by a radio wave not by people boarding the machine. We use the drone to respond quickly to the boating accident. To develop a smart drone for the high speed seamless video streaming in a long-range maritime, a necessary techniques are hardware design techniques that design structure of a drone, controlling techniques that operate a drone and communication techniques that control a drone in a long distance. In this paper, the limitations and techniques to design and implement the structure of drone supporting wideband multimedia communication for long-range maritime are explained. By expanding this communication drone network, it is aimed at improving utility of a drone.

Implementation of High-Speed Fresnelet Transform using Daubechies's Filter (드뷔시 필터를 이용한 고속 프레넬릿 변환의 구현)

  • Seo, Young-Ho;Lee, Yoon-Hyuk;Kim, Dong-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.4
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    • pp.820-828
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    • 2017
  • Service of digital hologram that has been recognized as a visual system for next generation requires various signal processing technologies. A transform is the most frequently used tool among signal processing techniques for 2-dimensional(D) and 3-D natural picture. A digital hologram has totally different property with a natural picture, so it is rarely efficient to apply transform tools used in 2-D image processing to a digital hologram. To overcome this a Fresnelet transform for a digital hologram has been proposed. We derive a Fresnelet transform by using the Daubechie's filter after applying an unitary Fresnel transform to a wavelet basis function. We also implement the transform as types of device and kernel code to improve operational performance. In consideration of the average time that is required for a pixel we can have observed the performance is improved up to 242 and 30 times for using the (9,7) and (5,3) filters in case of using device code.

Implementation of FlexRay Systems for Vehicle Appliacations (차량 내 통신을 위한 FlexRay 시스템 구현)

  • Jeon, Chang-Ha;Lee, Jae-Kyung;Jang, In-Gul;Chung, Jin-Gyun
    • Proceedings of the IEEK Conference
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    • 2009.05a
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    • pp.182-184
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    • 2009
  • FlexRay is a new standard of network communication system which provides a high speed serial communication, time triggered bus and fault tolerant communication between electronic devices for future automotive and ship applications. FlexRay communication controller(CC) is the core of the FlexRay protocol specification. In this paper, we first design the FlexRay CC protocol specification and function parts using SDL(Specification and Description Language). Then, the system is re-designed using Verilog HDL based on the SDL source. The FlexRay CC system was synthesized using Samsung $0.35{\mu}m$ technology. It is shown that the designed system can operate in the frequency range above 80 MHz. In addition, to show the validity of the designed FlexRay system, the FlexRay system is combined with sound source localization system in Robot applications. The combined system is implemented using ALTERA Excalibur ARM EPXA4F672C3. It is shown that the implemented system operates successfully.

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Design and Implementation of Low Power Touch Screen Controller for Mobile Devices (모바일용 저전력 터치 스크린 제어 회로 설계 및 구현)

  • Park, Sang-Bong
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.12 no.6
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    • pp.279-283
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    • 2012
  • In is paper, we design and implement the low power, high speed touch screen controller that calculates and outputs the coordinate of touch point on the touch screen of mobile devices. The system clock is 10HMz, the number of input channels is 21, standby current is $20{\mu}A$, dynamic range of input is 140pF~400pF and the response time is 0.1ms/frame. It contains the power management unit for low power, automatic impedance calibration unit in order to adapt to humidity, temperature and evaluation board, adjacent key and pattern interference suppression unit, serial interface unit of I2C and SPI. The function and performance is verified by using FPGA and $0.18{\mu}m$ CMOS standard process. The implemented touch screen is designed for using in the double layer ITO(Indium Thin Oxide) module with diamond pattern and single layer ITO module for cost-effective which are applied to mobile phone or smart remote controller.

A Design of Full-wave Rectifier for Measurement Instrument (계측기용 새로운 전파정류 회로 설계)

  • Bae Sung-Hoon;Lim Shin-Il
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.43 no.4 s.310
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    • pp.53-59
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    • 2006
  • This paper describes the new design technique of full wave rectifier (FWR) for precise measurement instrument and the chip implementation of this FWR circuit with measurement results. Conventional circuits have some problems of complex design and limited output range( $VDD/2{\sim}VLIIV1IT+$). Proposed FWR circuit was simply designed with two 2x1 MUXs, one high speed comparator, and one differential difference amplifier(DDA). One rail-to-rail differential difference amplifier(DDA) performs the DC level shifting to VSS and 2X amplification simultaneously, and enables the full range ($Vss{\sim}VDD$) operation. The proposed FWR circuits shows more than 50% reduction of chip area and power consumption compared to conventional one. Proposed circuit was implemented with 0.35um 1-poly 2-metal CMOS process. Core size is $150um{\times}450um$ and power dissipation is 840uW with 3.3V single supply.

A Design of high throughput IDCT processor in Distrited Arithmetic Method (처리율을 개선시킨 분산연산 방식의 IDCT 프로세서 설계)

  • 김병민;배현덕;조태원
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.6
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    • pp.48-57
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    • 2003
  • In this paper, An 8${\times}$l ID-IDCT processor with adder-based distributed arithmetic(DA) and bit-serial method Is presented. To reduce hardware cost and to improve operating speed, the proposed 8${\times}$1 ID-IDCT used the bit-serial method and DA method. The transform of coefficient equation results in reduction in hardware cost and has a regularity in implementation. The sign extension computation method reduces operation clock. As a result of logic synthesis, The gate count of designed 8${\times}$1 1D-IDCT is 17,504. The sign extension processing block has gate count of 3,620. That is 20% of total 8${\times}$1 ID-IDCT architecture. But the sign extension processing block improves more than twice in throughput. The designed IDCT processes 50Mpixels per second and at a clock frequency of 100MHz.

Geometrical Analysis and Implementation of the Real-Time Tuning Structure Using Spatial Light Modulator in Photorefractive Tunable Filter (광굴절 가변 필터에서 공간광학변조기를 이용한 실시간 튜닝 구조의 기하학적 해석 및 구현)

  • An, Jun-Won;Kim, Seong-Goo;Kim, Nam
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.12
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    • pp.43-52
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    • 1999
  • We propose a new method for tuning of center wavelength in photorefractive filter using $LiNbO_3$ crystal doped with 0.015Wt.% Fe. through the filter bandwidth property analysis using the geometrical method, a new wavelength selectivity theory was presented. In this scheme, the tuning of the center wavelength can be achieved by the real time incident angle control of the received heam, which was gotten by the spatial light modulator. So, tuning time depend on the response time of the SLM and results in the high speed turing. Because the use of thermally fixed grating in our filter, it has uniform diffraction property to the all filtering wavelength. Designed tunable filter has 4nm bandwidth and composed of the three channel with 10nm space. From the optical experiment, we get the 4.5nm, 4.25nm, 4nm bandwidth and 1530.5nm, 1540.5nm, 1549.5nm center wavelength respectively.

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Design and Implementation of ontology based context-awareness platform using driver intent information (운전자 의도정보를 이용한 온톨로지 기반 지능형자동차 상황인식 플랫폼 설계 및 구현)

  • Ko, Jae-Jin;Choi, Ki-Ho
    • Journal of Advanced Navigation Technology
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    • v.18 no.1
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    • pp.14-21
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    • 2014
  • In this paper, we devise a new ontology-based context-aware system to recognize the smart car information, in which driver's intent is utilized by information of car, driver, environment as well as driving state, driver state. So proposed system can handle dynamically risk changes by adding real-time situational awareness information. We utilize the camera image recognition technology for context-aware intelligent vehicle driving information, and implement information acquisition scheme OBD-II protocol to acquire vehicle's information. Experiments confirm that the proposed advanced driver safety assist system outperforms the conventional system, which only utilizes the information of vehicle, driver, and environmental information, to support the service of a high-speed driving, lane-departure service and emergency braking situation awareness.

Implementation of Channel Coding System using Viterbi Decoder of Pipeline-based Multi-Window (파이프라인 기반 다중윈도방식의 비터비 디코더를 이용한 채널 코딩 시스템의 구현)

  • Seo Young-Ho;Kim Dong-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.3
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    • pp.587-594
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    • 2005
  • In the paper, after we propose a viterbi decoder which has multiple buffering and parallel processing decoding scheme through expanding time-divided imput signal, and map a FPGA, we implement a channel coding system together with PC-based software. Continuous input signal is buffered as order of decoding length and is parallel decoded using a high speed cell for viterbi decoding. Output data rate increases linearly with the cell formed the viterbi decoder, and flexible operation can be satisfied by programming controller and modifying input buffer. The tell for viterbi decoder consists of HD block for calculating hamming distance, CM block for calculating value in each state, TB block for trace-back operation, and LIFO. The implemented cell of viterbi decoder used 351 LAB(Logic Arrary Block) and stably operated in maximum 139MHz in APEX20KC EP20K600CB652-7 FPGA of ALTERA. The whole viterbi decoder including viterbi decoding cells, input/output buffers, and a controller occupied the hardware resource of $23\%$ and has the output data rate of 1Gbps.

XML based Dynamic Search Agent for the Internet Efficient Multicast (인터넷 정보 검색을 위한 XML 기반 동적 탐색 에이전트 개발연구)

  • 이양원
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.598-601
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    • 2003
  • As the amount of information on the WWW is increasing at a very high speed, the role of search engines has become more necessary and important. Yet, current popular search engines have a limitation of scalability because the more information those engines gather, the more garbage hit search results are produced, thus, XML based metadata has recently been the issue of much focus. Metadata is information about information, which using a small potion of data can express the fundamental information about other information. XML enables data to be expressed better organized and well structured. Moreover, the information in those current efficiency and make them disappointed by dead links and obsolete pages. this is because the information was collected and indexed in advance before users do searching. therefore, a mechanism is required that cam search from current and up-to-date information resources dynamically in real time to avoid retrieving out of data information. In this study, a new concept search agent system for the WWW by using XML based technology is proposed. the implementation of the prototype of this proposed system, the comparison with traditional search engines, and the evaluation of the prototype system are also discussed.

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