• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.9
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• pp.737-740
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• 2009

SiC power device possesses attractive features, such as high breakdown voltage, high-speed switching capability, and high temperature operation. In general, device design has a significant effect on the switching characteristics, In this paper, we demonstrated that the switching performance of DMOSFETs are dependent on the with Channel length ($L_{channel}$) and Current Spreading Layer thickness ($T_{CSL}$) by using 2-D Mixed-mode simulations. The 4H-SiC DMOSFETs with a JFET region designed to block 800 V were optimized for minimum loss by adjusting the parameters of the JFET region, CSL, and epilayer. It is found that improvement of switching speed in 4H-SiC DMOSFETs is essential to reduce the gate-source capacitance and channel resistance. Therefore, accurate modeling of the operating conditions are essential for the optimizatin of superior switching performance.

• Journal of Internet Computing and Services
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• v.8 no.5
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• pp.161-170
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• 2007

The proposed switch which has separated data plane and switching plane can make parallel processing for packet data storing, memory address pointer switching and simultaneously can be capable of switching the variable length for IP packets. The proposed architecture does not require the complicated arbitration algorithms in VOQ, also is designed for QoS of generic output queue switch as well as input queue. At the result of simulations, the proposed architecture has less average packet delay than the one of the memory-sharing based architecture and guarantees keeping a certain average packet delay in increasing switch size.

• Proceedings of the KIEE Conference
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• 1994.11a
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• pp.156-158
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• 1994

In recent days, the various adjustable speed drives are widely employed at the industrial applications for the purpose of energy saving and speed control. In particular, for the machine control applications. the switching frequency is required to be increased for better dynamic performance of the drive. Moreover, this also leads to the reduction of the switching loss of the device. For IGBT (Insulated Gate Bipolar Transistor), the most widely used switching device in the inverters below the 100[kW] range, the falling and falling time is of the order about $200{\sim}300[ns]$. Therefore unexpected phenomena occurs such as voltage spikes due to high gradient of current at the switching instant, the weakening of motor insulation due to high gradient of voltage. In this paper, a new voltage gradient suppression technique is presented in both theoretically and experimentally.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.6
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• pp.530-536
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• 2000

• International Journal of Precision Engineering and Manufacturing
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• v.2 no.1
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• pp.33-42
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• 2001

In switched reluctance motor(SRM) deives, the turn-on and turn-off angles of each phase switch should be accurately controlled for accuracy and efficiency. The accuracy of the switching angles is mainly dependent upon the resolution of the encoder and the sampling period of the microprocessor, that are used to provide the information of the rotor position and to implement a control algorithm of the SRM, respectively. Thus, the higher the speed of the SRM is increased, the larger the amount of the switching angle deviations are from preset turn-on and turn-off angles. Consequently, the motor can not be driven stably high speed region. There fore, a simples and low cost encoder suitable for the practical and stable SRM drive is proposed and the control algorithm to provide the switching signals using a simple digital logic circuit is also presented for a wide speed range operation.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.2
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• pp.72-78
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• 2008

The speed variation of SRM is fulfilled throughout a transition from chopping control to single pulse operation. (i,e., low speed to high speed operation). It is unsatisfied with performance at all operational regimes. In this paper, the operational performance of SRM can be improved by using current hysteresis control method. This method maintains a generally flat current waveform. At the high speed, the current chopping capability is lost due to the development of the back-EMF. Therefore SRM operates in single pulse mode. By using zero-current switching and zero-voltage switching technique, the stress of power switches can be reduce in chopping mode. When the commutation from one phase winding to another phase winding, the current can be zero as fast as possible in this period because several times negative voltage of DC-source voltage produce in phase winding. This paper is compared to performance based on conventional C-dump converter topology and the proposed resonant C-dump converter topology. Simulation and experimental results are presented to verify the effectiveness of the proposed circuit.

• The KIPS Transactions:PartC
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• v.11C no.4
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• pp.527-538
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• 2004

In this paper, we present the flow aggregation method and the FLTC(flow lasting time control) algorithm to reduce the number of flows and solve the scalability problem in high speed IP switching networks. The flow aggregation based on the destination address could reduce the total number of flows, improve the label efficiency, and increase the total amount of the switched packets. The FLTC algorithm also eliminates the waste of label by deleting the flow binding efficiently. With the traces of real Internet traffics, we evaluate the performance of these schemes by simulation. The label efficiency, the average number of label used, and the percentage of packets switched and the number of packets switched are used as performance measures for this simulation.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.105-108
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• 1999

In this paper, we define the high-speed router as a router, which can support aggregated ports over 25Gbps, and provide issues and trends in high-speed router design. We propose design considerations on IP packet forwarding, switching fabric, packet scheduling and buffer management, network resource reservation, and router operation and administration.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.7
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• pp.1075-1083
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• 1994

In this paper, a study on the improvement of the IM speed response against load torque variation is presented. A VSCS(Variable Structure Control System) is proposed which gives the desired robustness against load torque variation using a new kind of time-varing switching plane. In order to eliminate the reaching phase of the states from one switching plane to another during variation, the switching plane is varied continuously. To verify the high dynamic performance of the proposed VSCS, simulation and experimental results are presented.

• ETRI Journal
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• v.31 no.3
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• pp.342-344
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• 2009

From a hydrodynamic device simulation for the pseudomorphic high electron mobility transistors (pHEMTs), we observe an increase of maximum extrinsic transconductance and a decrease of source-drain capacitances. This gives rise to an enhancement of the switching speed and isolation characteristics as the upper-to-lower planar-doping ratios (UTLPDR) increase. On the basis of simulation results, we fabricate single-pole-double-throw transmitter/receiver monolithic microwave integrated circuit (MMIC) switches with the pHEMTs of two different UTLPDRs (4:1 and 1:2). The MMIC switch with a 4:1 UTLPDR shows about 2.9 dB higher isolation and approximately 2.5 times faster switching speed than those with a 1:2 UTLPDR.