• 제어로봇시스템학회논문지
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• 제6권5호
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• pp.339-344
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• 2000

This paper is concerned with the simplification of complex linear time-invariant systems. A simple technique is suggested using the well-known least squares method in the frequency domain. Given a high-order transfer function in the s- or z-domain, the squared-gain function corresponding to a low-order model is computed by the least squares method. Then, the low-order transfer function is obtained through the factorization. Three examples are given to illustrate the efficiency of the proposed method.

• 대한전자공학회논문지SD
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• 제45권4호
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• pp.146-153
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• 2008

High speed serial link에 적합한 clock multiphase generator용 integrated phase-locked loop (PLL)을 설계하였다. 설계된 PLL은 programmable current mirror를 사용하여 동작 범위 안에서 동일한 loop bandwidth와 damping factor를 가진다. 또한 설계한 PLL 회로 netlists를 가지고 HSPICE 시뮬레이션을 통해 close-loop transfer function과 VCO의 phase noise transfer function을 구하였다. Board 위 칩의 자체 임피던스는 decoupling capacitor의 크기와 위치에 따라 계산된다. 세부적으로, close-loop transfer function에서 gain의 최대값과 VCO noise transfer function에서 gain의 최대값 사이의 주파수범위에서 decoupling capacitor의 크기와 위치에 따른 보드 위 칩의 자체 임피던스를 구하였다. 이를 바탕으로 보드에서의 decoupling capacitor의 크기와 위치가 PLL의 jitter에 어떠한 영향을 미치는지 분석하였다. 설계된 PLL은 1.8V의 동작 전압에서 400MHz에서 2GH의 wide operation range를 가지며 $0.18-{\mu}m$ EMOS공정으로 설계하였다. Reference clock은 100MHz이며 전체 PLL power consumption은 1.2GHz에서 17.28 mW이다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.768-776
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• 2014

Using a simplified high-frequency small-signal equivalent circuit model for BSIM3 MOSFET, the fully differential two-stage folded-cascode CMOS operational amplifier is analyzed to obtain its small-signal voltage transfer function. As a result, the expressions for dc gain, five zero frequencies, five pole frequencies, unity-gain frequency, and phase margin are derived for op amp design using design equations. Then the analysis result is verified through the comparison with Spice simulations of both a high speed op amp and a low power op amp designed for the $0.13{\mu}m$ CMOS process.

• 융합신호처리학회논문지
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• 제9권2호
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• pp.159-163
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• 2008

본 논문에서는 유연모드 부속물을 갖는 우주선의 제어를 위해서 누스범 이득을 갖는 간단한 형태의 적응제어기를 제안한다. 이 방법은 전달함수에서 고주파 이득의 정보가 필요하지 않는다. 본 논문의 방법을 사용하여 피치각도가 목표치를 추종하는 중에, 아울러 유연모드의 안정화도 이룬다. 피치각과 피치각속도 성분만 사용하여 출력궤환제어기를 설계한다. 특히 모든 시스템 파라미터 및 고주파성분은 미지로 한다. 설계의 간편성을 위해서 선형함수만을 사용하여 설계한 제어기가 전체 비선형시스템을 만족함을 시뮬레이션을 통하여 보이고, 그 근거도 설명한다. Lyapunov 함수를 구성하여 제안한 방법의 안정성을 증명하고, MATLAB을 이용한 컴퓨터 시뮬레이션 결과를 제시하여 제안한 방법의 유용성을 증명한다.

• 제어로봇시스템학회논문지
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• 제6권4호
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• pp.247-253
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• 2000

In this paper, we deal with the full range control problem of nonlinear boiler systems subject to complex actuator constraints. Firstly, $H\infty$ loop shaping design procedure［10］ is used for the controller design. Secondly, modified high-gain feedback［11］ for the loop shaping controller is adopted for the anti-windup function and the bumpless transfer technique between controllers is proposed for the full range control of nonlinear systems. Finally, the performance of the proposed controller is demonstrated through the simulation studies.

• 한국소음진동공학회논문집
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• 제21권10호
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• pp.940-950
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• 2011

This paper reports a filtered velocity feedback(FVF) controller, which is an alternative to direct velocity feedback(DVFB) controller. The instability problems at high frequencies due to non-collocated sensor/actuator configuration with the DVFB can be alleviated by the proposed FVF controller. The FVF controller is designed to filter out the unstable high frequency response. The dynamics of a clamped plate under forces and moments and the FVF controllers are formulated. The stability of the control system and performance are investigated with the open loop transfer function(OLTF). It is found that the FVF controller has a higher gain margin than the corresponding DVFB controller owing to the rapid roll-off behavior at high frequencies. Although the gain margin cannot be fully utilized because of the enhancement at the high frequencies, the vibration at the modes lower than the tuning frequency is well controlled. This performance of the FVF controller is shown to be improved from that of the DVFB controller. It is, however, noted that the stability around the tuning frequency is very sensitive so that the enhancement in vibration level should be followed. The reduction performance at low frequencies using the FVF controller should be compromised with the enhancement in the vibration at high frequencies while designing the controller.

• 한국전자파학회논문지
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• 제12권5호
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• pp.686-693
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• 2001

본 논문에서는 대전력 증폭기의 비선형 전달 특성을 나타내는 Carrier Complex Power Series를 유도하였고, 이 전달함수를 이용하여 대전력 증폭기를 선형화하기 위한 전치 왜곡기의 비선형 전달 특성을 유도하고 구현하였다. 측정 시료로 제작된 IMT-2000 기지국 송신 대역 대전력 증폭기의 이득은 34.6 dB이고 P$_{1dB}$가 35.4 dBm이다. Inverse Carrier Complex Power Series를 이용한 전치 왜곡기를 제작하고, 대전력 증폭기에 부착하여 주파수가 각각 2.1375 GHz와 2.1425 GHz($\Delta$f=5 MHz)인 2-tone 신호의 출력이 25.43 dBm/tone일 때 17 dB의 개선 특성을 얻었다.다.

• 한국소음진동공학회논문집
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• 제21권5호
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• pp.447-454
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• 2011

This paper reports a filtered velocity feedback(FVF) controller, which is an alternative to direct velocity feedback(DVFB) controller. The instability problems due to high frequency response under DVFB can be alleviated by the suggested FVF controller. The FVF controller is designed to filter out the unstable high frequency response. The FVF controller and the dynamics of clamped beams under forces and moments are first formulated. The effects of the design parameters(cut-off frequency, gain, and damping ratio) on the stability and the performance are then investigated. The cut-off frequency should be selected not to affect the system stability. The magnitude of the open loop transfer function(OLTF) at the cut-off frequency should be small. As increasing the gain of the FVF controller, the magnitude of the OLTF is increased, so that the closed loop response can be reduced more. The enhancement of the OLTF at the cut-off frequency is reduced but the phase behavior around the cut-off frequency is distorted, as the damping ratio is increased. The control performance is finally estimated for the clamped beam. More than 10 dB reductions in velocity response can be achieved at the modal frequencies from the first to eighth modes.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2011년도 춘계학술대회 논문집
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• pp.264-270
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• 2011

This paper reports a filtered velocity feedback (FVF) controller, which is an alternative to direct velocity feedback (DVFB) controller. The instability problems due to high frequency response under DVFB can be alleviated by the suggested FVF controller. The FVF controller is designed to filter out the unstable high frequency response. The FVF controller and the dynamics of clamped beams under forces and moments are first formulated The effects of the design parameters (cut-off frequency, gain, and damping ratio) on the stability and the performance are then investigated. The cut-off frequency should be selected not to affect the system stability. The magnitude of the open loop transfer function (OLTF) at the cut-off frequency should be small. As increasing the gain of the FVF controller, the magnitude of the OLTF is increased, so that the closed loop response can be reduced more. The enhancement of the OLTF at the cut-off frequency is reduced but the phase behavior around the cut-off frequency is distorted, as the damping ratio is increased The control performance is finally estimated for the clamped beam. More than 10dB reductions in velocity response can be achieved at the modal frequencies from the first to eighth modes.

• ETRI Journal
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• 제45권4호
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• pp.690-703
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• 2023

Multistage amplifiers have become appropriate choices for high-speed electronics and data conversion. Because of the large number of high-impedance nodes, frequency compensation has become the biggest challenge in the design of multistage amplifiers. The new compensation technique in this study uses two differential stages to organize feedforward and feedback paths. Five Miller loops and a 500-pF load capacitor are driven by just two tiny compensating capacitors, each with a capacitance of less than 10 pF. The symbolic transfer function is calculated to estimate the circuit dynamics and HSPICE and TSMC 0.18 ㎛. CMOS technology is used to simulate the proposed five-stage amplifier. A straightforward iterative approach is also used to optimize the circuit parameters given a known cost function. According to simulation and mathematical results, the proposed structure has a DC gain of 190 dB, a gain bandwidth product of 15 MHz, a phase margin of 89°, and a power dissipation of 590 ㎼.