• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.4
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• pp.318-330
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• 2013

This paper presents a high-linearity low-noise small-size programmable gain amplifier (PGA) based on a new low-noise low-distortion differential amplifier and a proposed reconfiguration technique. The proposed differential amplifier combines an inverter-based differential pair with an adaptive biasing circuit to reduce noise and distortion. The reconfiguration technique saves the chip size by half by utilizing the same differential pair for the input transconductance and load-stage, interchangeably. Fabricated in $0.18-{\mu}m$ CMOS, the proposed PGA shows a dB-linear control range of 21dB in 16 steps from -11 dB to 10 dB with a gain error of less than ${\pm}0.33$ dB, an IIP3 of 7.4~14.5 dBm, a P1dB of -7~1.2 dBm, a noise figure of 13dB, and a 3-dB bandwidth of 270MHz at the maximum gain, respectively. The PGA occupies a chip area of $0.04mm^2$ and consumes only 1.3 mA from the 1.8 V supply.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.712-717
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• 2014

The performance of npn SiGe HBT on thin film SOI is investigated at 32 nm technology node by applying body bias. An n-well is created underneath thin BOX to isolate the body biased SOI HBT from SOI CMOS. The results show that the HBT voltage gain and power gain can be programmed by applying body bias to the n-well. This HBT can be used in variable gain amplifiers that are widely used in the receiver chain of RF systems. The HBT is compatible with 32 nm FDSOI technology having 10 nm film thickness and 30 nm BOX thickness. As the breakdown voltage increases by applying the body bias, the SOI HBT with 3 V $V_{CE}$ has very high $f_tBV_{CEO}$ product (839 GHzV). The self heating performance of the proposed SOI HBT is studied. The high voltage gain and power gain (60 dB) of this HBT will be useful in designing analog/RF systems which cannot be achieved using 32 nm SOI CMOS (usually voltage gain is in the range of 10-20 dB).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.9
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• pp.743-749
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• 2002

A 1.5V 70㏈ 100MHz CMOS class-AB complementary operational amplifier is presented. For obtaining the high gain and the high unity gain frequency, the input stage of the amplifier is designed with rail-to-rail complementary differential pairs which are symmetrically parallel-connected with the NMOS and the PMOS differential input pairs, and the output stage is designed to the rail-to-rail class-AB output stage including the elementary shunt stage technique. With this design technique for output stage, the load dependence of the overall open loop gain is improved and the push-pull class-AB current control can be implemented in a simple way. The designed operational amplifier operates perfectly on the complementary mode with 180$^{\circ}$ phase conversion for 1.5V supply voltage, and shows the push-pull class-AB operation. In addition, the amplifier shows the DC open loop gain of 70.4 ㏈ and the unity gain frequency of 102 MHz for $C_{L=10㎊∥}$ $R_{L=1㏁}$ Parallel loads. When the resistive load $R_{L}$ is varied from 1 ㏁ to 1 ㏀, the DC open loop gain of the amplifier decreases by only 2.2 ㏈.a$, the DC open loop gain of the amplifier decreases by only 2.2 dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.8
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• pp.867-880
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• 1992

In this paper, a circuit design techniques for Improving the voltage gain of the GaAs MESFET single amplifier is presented. Also, various types of existing current mirror and proposed current mirror of new configuration are compared. To obtain the high differential mode gain and low common mode gain, bootstrap gain enhancement technique Is used and common mode feedback Is employed In the design of differential amplifier. The simulation results show that designed differential amplifier has differential gain of 57.66dB, unity gain frequency of 23.25GHz. Also, differential amplifier using common mode feedback with alternative negative current mirror has CMRR of 83.S8dB, stew rate of 3500 V /\ulcorners.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.2
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• pp.10-20
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• 1997

This paper describes the design, the manufacture and the development of th eautomatic gain control unit which ajdusts the gain of IF processor in the high sensitive & multifunctional receiver unit (HMR) for pulse doppler radar system. Accodording to the effective distnce of target, radar cross section, and a lot of external environments (such as clutter), the receiving stage of RADAR system often deviates from dynamic range. To solve this kind o fproblem, continuous/pulse wave AGC are realized, make it possible to control the gain characteristics of receiver stably, and can increase dynamic range linearly by adjusting the gain slope of receiver which is limited by 1-dB gain compression point. In this study, AGC unit is designed to regulate the total gain of receiver by using te analog feedback theory. It also has rapid enough response to process pulse signal. This study presents the gain control method of IF, the real manufacture technique (the package-type components) and the measurement performance of AGC.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.309-312
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• 2002

In this paper, we discuss the design of high gain low noise amplifier by using the 0.2sum CMOS technology. A cascode inverter is adopted to implement the low noise amplifier. The proposed cascode inverter LNA is one stage amplifier with a voltage reference and without choke inductors. The designed 2.4GHz LNA achieves a power gain of 25dB, a noise figure of 2.2dB, and power consumption of 255㎽ at 2.5V power supply.

• Asian Journal of Innovation and Policy
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• v.6 no.3
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• pp.274-294
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• 2017

While studies have viewed the effect of Chinese talent-attracting programs launched by government since reform and open door policy, little of them has assessed these programs empirically and pertinently. This article intends to assess an important program - the Thousand Youth Talents Program (TYTP). Frist, this paper proposed a transnational migration matrix of the academics to clarify the dynamic mechanism of academic brain gain at the high end. Then, the Kaplan-Meier analysis and Cox regression model are used to empirically analyze the policy effect of TYTP. The results show that, academic ability have double edged impacts on brain gain at the high end, some scholars whose last employer's academic ranking is world's Top100 have stronger willing to return, and the negative effect of academic ranking decreases with time passing; while scholars with a tenure-track position, a tenure position or a permanent position tend to stay overseas, and the hazard rate of staying increases with age. The older scholars have more intentions to go back China, while gender was not a significant factor influencing academic return at the high end. That is, the talent-attracting programs has partly succeeded in bringing back the academics at the high end.

• Journal of Power Electronics
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• v.18 no.1
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• pp.11-22
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• 2018

This paper presents a single switch, high step-up, non-isolated dc-dc converter suitable for renewable energy applications. The proposed converter is composed of a coupled inductor, a passive clamp circuit, a switched capacitor and voltage lift circuits. The passive clamp recovers the leakage inductance energy of the coupled inductor and limits the voltage spike on the switch. The configuration of the passive clamp and switched capacitor circuit increases the voltage gain. A wide continuous conduction mode (CCM) operation range, a low turn ratio for the coupled inductor, low voltage stress on the switch, switch turn on under almost zero current switching (ZCS), low voltage stress on the diodes, leakage inductance energy recovery, high efficiency and a high voltage gain without a large duty cycle are the benefits of this converter. The steady state operation of the converter in the continuous conduction mode (CCM) and discontinuous conduction mode (DCM) is discussed and analyzed. A 200W prototype converter with a 28V input and a 380V output voltage is implemented and tested to verify the theoretical analysis.

• Journal of Nutrition and Health
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• v.43 no.2
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• pp.141-151
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• 2010

Gestational age and infant birth weight are influenced by gestational weight gain. This study was aimed to examine the effects of gestational weight gain on pregnancy outcomes. Pregnant women were recruited at two hospitals in Seoul area. Characteristics and dietary intakes of pregnant women were obtained using 24-hour recall questionnaires. Gestational weight gain was categorized as less (Under-gain) than, within (Recommended gain), or greater (Over-gain) than the Institute of Medicine guidelines. Maternal height and pre-pregnancy weight in the over-gain group significantly higher than under-gain and recommended gain group. Mini dietary assessment score of eating bean has significantly higher in under-gain group than recommended gain group and eating kimchi has significantly higher in undergain group than over-gain group. Score of eating fruit was significantly higher in over-gain group than other groups. The mean intake of carbohydrate in the recommended gain group were significantly higher than under-gain group, and mean intake of potassium in the over-gain group were significantly higher than under-gain group. Under-gain group showed the high rate of the preterm delivery and low birth weight infant delivery. However recommended gain group showed 46% reduced risk of preterm delivery (OR = 0.54 CI = 0.30-0.98). Risk of macrosomia increased with increasing gestational weight gain (p for trend < 0.05). In conclusion, pregnancy outcomes were influenced by gestational weight gain. Therefore, these finding suggested adequate gestational weight gain according to BMI for reducing the risk of preterm delivery, low birth weight and macrosomia.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1402-1412
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• 2017

This paper presents a new high step-up dc/dc converter for renewable energy systems in which a high voltage gain is provided by using a coupled inductor. The operation of the proposed converter is based on a charging capacitor with a single power switch in its structure. A passive clamp circuit composed of capacitors and diodes is employed in the proposed converter for lowering the voltage stress on the power switch as well as increasing the voltage gain of the converter. Since the voltage stress is low in the provided topology, a switch with a small ON-state resistance can be used. As a result, the losses are decreased and the efficiency is increased. The operating principle and steady-states analyses are discussed in detail. To confirm the viability and accurate performance of the proposed high step-up dc-dc converter, several simulation and experimental results obtained through PSCAD/EMTDC software and a built prototype are provided.