• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
• /
• pp.444-444
• /
• 2000

For a class of nonlinear systems which satisfy a certain condition so called output feedback exponential passivity (OFEP), it is well known that one can easily design a high-gain output feedback control system. The designed high-gain controller has simple structure and high robustness. However, from the viewpoint of practical application, it is important to consider a robust control scheme for controlled systems for which some of the assumptions of output feedback stabilization are not valid. In this paper. we deal with a design problem of the robust high-gain adaptive output feedback control for the above-mentioned class of nonlinear systems with uncertain nonlinearities and/or disturbances.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 2001년도 ICCAS
• /
• pp.34.4-34
• /
• 2001

It is well known that one can easily design a high-gain adaptive output feedback control for a class of nonlinear systems which satisfy a certain condition so called output feedback exponential passivity (OFEP). The designed high gain adaptive controller has simple structure and high robustness with regard to bounded disterbances and unknown order of the controlled system. However, from the viewpoint of practical application, it is important to consider a robust control scheme for controlled systems for which some of the assumptions of output feedback stabilization are not valid. In this paper, we deal with a design problem of the robust high-gain adaptive output feedback control for the OFEP nonlinear systems with uncertain nonlinearities and/or disturbances.

• 전기학회논문지
• /
• 제57권6호
• /
• pp.982-984
• /
• 2008

This paper suggests anon-isolated high-gain boost converter using voltage-stacking cell. The voltage gain can be increased by adjusting number of voltage-stacking cells and transformer turns-ratio. Test results with 1kW prototype converter show that the voltage gain is three or four times higher than conventional boost converter at unity transformer turns-ratio and about 90% of efficiency is recorded under full load condition.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 2001년도 ICCAS
• /
• pp.141.1-141
• /
• 2001

This paper describes an approach for synthesizing a modularized gain scheduled PD type fuzzy logic controller(FLC) for a high maneuverable aircraft system, where the gains of FLC are on-line adapted according to the flight condition. Specially, the systematic procedure via root locus technique is carried out for the sellection of the gains of FLC. Simulation results demonstrate that the proposed gain scheduled fuzzy logic controller yields better control performance than the normal (without gain scheduling) fuzzy controller.

• 한국통신학회논문지
• /
• 제25권1B호
• /
• pp.8-14
• /
• 2000

광여기 MQW(Multiple Quantum Well)면형 광증폭기에 대한 이득해석과 더불어 제작 및 측정을 수행하였다. 제안된 광증폭기는 편광무의존성, 광섬유와의 높은 결합효율, 그리고 동작파장의 자유도가 높다는 등의 장점을 자니고 있다. 본 논문에서는 100내지 200주기 MQW의 이득특성을 격자왜곡과 선택도핑의 효과를 고려해 해석하였다. 그 결과, 3㏈정도의 단일경로이득과 넓은 동작파장특성을 나타내었으며 이 해석 결과는 우리들이 행한 실험결과와 거의 일치하였다. 면형 광증폭기의 단일경로이득이 낮으면 FPI(Fabry-Perot Interferometer)구조로 증폭률을 높이는데는 협대역성의 문제가 발생하나,2-3㏈이상의 적정한 단일경로이득을 가질 경우, FPI 구조로 고이득과 적정한 동작파장특성을 가지게 할 수 있다. 예를 들면 단일경로이득이 3㏈인 MQW를 FPI 구조로 할 경우, 최대이득 10.1㏈, 동작파장대역이 4.6nm의 특성을 가지도록 할 수 있음을 보였다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1995년도 하계학술대회 논문집 C
• /
• pp.1108-1110
• /
• 1995

This paper presents a balanced CMOS complementary folded cascode OP-AMP topology that achieves improved DC gain using the gain boosting technique, a high unity-gain frequency and improved slew rate using the CMOS complementary cascode structure and a high PSRR using the balanced output stage. Bode-plot measurements of a balanced CMOS complementary folded cascode OP-AMP show a DC gain of 80dB, a unity-gain frequency of 110MHz and a slew rate of $274V/{\mu}s$(1pF load). This balanced CMOS complementary folded cascode OP-AMP is well suited for high frequency analog signal processing applications.

• 한국멀티미디어학회논문지
• /
• 제6권1호
• /
• pp.161-166
• /
• 2003

본 논문에서는 블루투스에서 사용할 0.25$\mu\textrm{m}$ CMOS 공정을 이용한 고이득 저잡음 증폭기를 설계하였다. 설계한 저잡음 증폭기는 캐스코드 인버터를 이용하였으며, 레퍼런스 전압원을 가지고 쵸크 인덕터를 사용하지 않는 1단으로 설계하였다. 기존 1단으로 설계된 저잡음 증폭기의 10~15dB의 낮은 전력이득을 개선한 구조이다. 설계된 2.4GHz 저잡음 증폭기는 2.2dB의 NF값과 21dB의 높은 전력이득을 가지고 있으며, 2.5V 공급 전원에서 255mW 소모전력을 갖는다

• Journal of Power Electronics
• /
• 제19권3호
• /
• pp.676-690
• /
• 2019

This paper presents a switched capacitor (SC) based bidirectional dc-dc converter topology for high voltage gain applications. The proposed converter is able to operate with multiple integral voltage conversion ratios based on user input. The architecture of a user-friendly, inductor-less multi-voltage-gain bidirectional dc-dc converter is proposed in this study. The inductor-less or magnetic-less design of the proposed converter makes it effective in higher temperature applications. Furthermore, the proposed converter has a reduced component count and lower voltage stress across its switches and capacitors when compared to existing SC converters. An output impedance analysis of the proposed converter is presented and compared with popular existing SC converters. The proposed converter is simulated in the OrCAD PSpice environment and the obtained results are presented. A 200 W hardware prototype of the proposed SC converter has been developed. Experimental results are presented to validate the efficacy of the proposed converter.

• 한국정보통신학회논문지
• /
• 제25권6호
• /
• pp.853-856
• /
• 2021

In this paper, a low noise amplifier having high gain and low noise by using input and inter stage matching circuits has been designed. A current-reused two-stage common-source topology is adopted, which can obtain high gain and low power consumption. Deterioration of noise characteristics according to the source inductive degeneration matching is compensated by adopting additional matching circuits. Moreover trade-offs among noise, gain, linearity, impedance matching, and power dissipation have been considered. In this design, 0.18-mm CMOS process is employed for the simulation. The simulated results show that the designed low noise amplifier can provide high power gain and low noise characteristics.

• Journal of electromagnetic engineering and science
• /
• 제14권2호
• /
• pp.47-53
• /
• 2014

This paper presents a high gain and high harmonic rejection low-noise amplifier (LNA) for software-defined radio receiver. This LNA exploits the high quality factor (Q) series resonance technique. High Q series resonance can amplify the in-band signal voltage and attenuate the out-band signals. This is achieved by a source impedance transformation. This technique does not consume power and can easily support multiband operation. The chip is fabricated in a $0.13-{\mu}m$ CMOS. It supports four bands (640, 710, 830, and 1,070MHz). The measured forward gain ($S_{21}$) is between 12.1 and 17.4 dB and the noise figure is between 2.7 and 3.3 dB. The IIP3 measures between -5.7 and -10.8 dBm, and the third harmonic rejection ratios are more than 30 dB. The LNA consumes 9.6 mW from a 1.2-V supply.