• Title/Summary/Keyword: High electron mobility transistor

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Modeling and Optimization of $sub-0.1\;{\mu}m$ gate Metamorphic High Electron Mobility Transistors ($0.1\;{\mu}m$ 이하의 게이트 길이를 갖는 Metamorphic High Electron Mobility Transistor의 모델링 및 구조 최적화)

  • Han Min;Kim Sam-Dong;Rhee Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.3 s.333
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    • pp.1-8
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    • 2005
  • In this paper, we analyzed the DC and RF characteristics of $0.1\;{\mu}m$ metamorphic high electron mobility transistor (MHEMT) using the ISE-TCAD simulation tool. we also analyzed the effects or the scaling on vertical and lateral dimensions such as a gate length, source-drain spacing, and channel thickness. We discussed the degradation of extrinsic transconductance $g_{m,max}$ in the MHEMTs adopting the gate length $(L_g)$ of $sub-0.1\;{\mu}m$. We suggested the model describing the effects on the vertical and lateral parameter scaling.

Correlation between Physical Defects and Performance in AlGaN/GaN High Electron Mobility Transistor Devices

  • Park, Seong-Yong;Lee, Tae-Hun;Kim, Moon-J.
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.2
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    • pp.49-53
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    • 2010
  • Microstructural origins of leakage current and physical degradation during operation in product-quality AlGaN/GaN high electron mobility transistor (HEMT) devices were investigated using photon emission microscopy (PEM) and transmission electron microscopy (TEM). AlGaN/GaN HEMTs were fabricated with metal organic chemical vapor deposition on semi-insulating SiC substrates. Photon emission irregularity, which is indicative of gate leakage current, was measured by PEM. Site specific TEM analysis assisted by a focused ion beam revealed the presence of threading dislocations in the channel below the gate at the position showing strong photon emissions. Observation of electrically degraded devices after life tests revealed crack/pit shaped defects next to the drain in the top AlGaN layer. The morphology of the defects was three-dimensionally investigated via electron tomography.

Simulation Study on the DC/RF Characteristics of MHEMTs (MHEMT 소자의 DC/RF 특성에 대한 시뮬레이션 연구)

  • Son, Myung-Sik
    • Journal of the Korean Vacuum Society
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    • v.20 no.5
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    • pp.345-355
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    • 2011
  • GaAs-based metamorphic high electron mobility transistors (MHEMTs) and InP-based high electron mobility transistors (HEMTs) have good microwave and millimeter-wave frequency performance with lower minimum noise figure. MHEMTs have some advantages, especially for cost, compared with InP-based ones. In this paper, InAlAs/InxGa1-xAs/GaAs MHEMTs are simulated for DC/RF small-signal analysis. The hydrodynamic simulation parameters are calibrated to a fabricated 0.1-${\mu}m$ ${\Gamma}$-gate MHEMT device having the modulation-doped $In_{0.52}Al_{0.48}As/In_{0.53}Ga_{0.47}As$ heterostructure on the GaAs substrate, and the simulations for RF small-signal characteristics are performed, compared with the measured data, and analyzed for the devices. In addition, the simulations for the DC/RF characteristics of the MHEMTs with different gate-recess structures are performed, compared and analyzed.

Non-monotonic Size Dependence of Electron Mobility in Indium Oxide Nanocrystals Thin Film Transistor

  • Pham, Hien Thu;Jeong, Hyun-Dam
    • Bulletin of the Korean Chemical Society
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    • v.35 no.8
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    • pp.2505-2511
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    • 2014
  • Indium oxide nanocrystals ($In_2O_3$ NCs) with sizes of 5.5 nm-10 nm were synthesized by hot injection of the mixture precursors, indium acetate and oleic acid, into alcohol solution (1-octadecanol and 1-octadecence mixture). Field emission transmission electron microscopy (FE-TEM), High resolution X-Ray diffraction (X-ray), Nuclear magnetic resonance (NMR), and Fourier transform infrared spectroscopy (FT-IR) were employed to investigate the size, surface molecular structure, and crystallinity of the synthesized $In_2O_3$ NCs. When covered by oleic acid as a capping group, the $In_2O_3$ NCs had a high crystallinity with a cubic structure, demonstrating a narrow size distribution. A high mobility of $2.51cm^2/V{\cdot}s$ and an on/off current ratio of about $1.0{\times}10^3$ were observed with an $In_2O_3$ NCs thin film transistor (TFT) device, where the channel layer of $In_2O_3$ NCs thin films were formed by a solution process of spin coating, cured at a relatively low temperature, $350^{\circ}C$. A size-dependent, non-monotonic trend on electron mobility was distinctly observed: the electron mobility increased from $0.43cm^2/V{\cdot}s$ for NCs with a 5.5 nm diameter to $2.51cm^2/V{\cdot}s$ for NCs with a diameter of 7.1 nm, and then decreased for NCs larger than 7.1 nm. This phenomenon is clearly explained by the combination of a smaller number of hops, a decrease in charging energy, and a decrease in electronic coupling with the increasing NC size, where the crossover diameter is estimated to be 7.1 nm. The decrease in electronic coupling proved to be the decisive factor giving rise to the decrease in the mobility associated with increasing size in the larger NCs above the crossover diameter.

A Dual Gate AlGaN/GaN High Electron Mobility Transistor with High Breakdown Voltages (높은 항복 전압 특성을 가지는 이중 게이트 AlGaN/GaN 고 전자 이동도 트랜지스터)

  • Ha Min-Woo;Lee Seung-Chul;Her Jin-Cherl;Seo Kwang-Seok;Han Min-Koo
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.54 no.1
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    • pp.18-22
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    • 2005
  • We have proposed and fabricated a dual gate AlGaN/GaN high electron mobility transistor (HEMT), which exhibits the low leakage current and the high breakdown voltage for the high voltage switching applications. The additional gate between the main gate and the drain is specially designed in order to decrease the electric field concentration at the drain-side of the main gate. The leakage current of the proposed HEMT is decreased considerably and the breakdown voltage increases without sacrificing any other electric characteristics such as the transconductance and the drain current. The experimental results show that the breakdown voltage and the leakage current of proposed HEMT are 362 V and 75 nA while those of the conventional HEMT are 196 V and 428 nA, respectively.

Optimization of Ohmic Contact Metallization Process for AlGaN/GaN High Electron Mobility Transistor

  • Wang, Cong;Cho, Sung-Jin;Kim, Nam-Young
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.1
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    • pp.32-35
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    • 2013
  • In this paper, a manufacturing process was developed for fabricating high-quality AlGaN/GaN high electron mobility transistors (HEMTs) on silicon carbide (SiC) substrates. Various conditions and processing methods regarding the ohmic contact and pre-metal-deposition $BCl_3$ etching processes were evaluated in terms of the device performance. In order to obtain a good ohmic contact performance, we tested a Ti/Al/Ta/Au ohmic contact metallization scheme under different rapid thermal annealing (RTA) temperature and time. A $BCl_3$-based reactive-ion etching (RIE) method was performed before the ohmic metallization, since this approach was shown to produce a better ohmic contact compared to the as-fabricated HEMTs. A HEMT with a 0.5 ${\mu}m$ gate length was fabricated using this novel manufacturing process, which exhibits a maximum drain current density of 720 mA/mm and a peak transconductance of 235 mS/mm. The X-band output power density was 6.4 W/mm with a 53% power added efficiency (PAE).

The Field Modulation Effect of a Fluoride Plasma Treatment on the Blocking Characteristics of AlGaN/GaN High Electron Mobility Transistors

  • Kim, Young-Shil;Seok, O-Gyun;Han, Min-Koo;Ha, Min-Woo
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.4
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    • pp.148-151
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    • 2011
  • We designed and fabricated aluminium gallium nitride (AlGaN)/GaN high electron mobility transistors (HEMTs) with stable reverse blocking characteristics established by employing a selective fluoride plasma treatment on the drainside gate edge region where the electric field is concentrated. Implanted fluoride ions caused a depolarization in the AlGaN layer and introduced an extra depletion region. The overall contour of the depletion region was expanded along the drift region. The expanded depletion region distributed the field more uniformly and reduced the field intensity peak. Through this field modulation, the leakage current was reduced to 9.3 nA and the breakdown voltage ($V_{BR}$) improved from 900 V to 1,400 V.

Thermally Stable Ohmic Contacts for High Electron Mobility Transistors (High Electron Mobility Transistor 소자의 고 내열성)

  • Kim, Yeong-Jung;Kim, Hyeong-Jun
    • Korean Journal of Materials Research
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    • v.7 no.5
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    • pp.390-396
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    • 1997
  • AIGaAs/InGaAs/GaAs high electron mobility transisters(HEMT)소자의 오믹 접합재료로 일반적으로 사용되고 있는 AuGeNi의 접합저항과 열적 안정성을 향상시키기 위한 새로운 접합재료에 대해 연구하였다. 이를 위해 sub/M$_{1}$Au-Ge/M$_{2}$Au의 구조에서 M$_{1}$을 Ni과 Pd, M$_{2}$를 Ni, Ti, Mo로 하였을 경우의 접합 재료에 대한 오믹 접합 특성의 변화를 조사하였다. 또한 일반 열처리로와 램프 히터를 이용한 고속 열처리에 따른 오믹 특성을 조사하였다. M$_{1}$을 Ni에서 Pd으로 대체하였을 경우 접합 저항은 약간 증가하였으며 접합 특성의 개선을 관찰되지 않았다. M$_{2}$를 Ni에서 Ti이나 Mo로 대치하였을 경우, 접합 저항은 감소하였고 열적 안정성과 접합 형상은 현저히 개선되었다. 특히 Ni/Au-Ge/Mo/Au의 접합재료는 급속 열처리에 의해 -0.1Ωmm의 극히 낮은 잡합 저항과 우수한 접합 형상을 갖는 것으로 조사되었다.

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A Study on Electric Characteristics of Silicon Implanted p Channel Polycrystalline Silicon Thin Film Transistors Fabricated on High Temperature (고온에서 제조된 실리콘 주입 p채널 다결정 실리콘 박막 트랜지스터의 전기 특성 변화 연구)

  • Lee, Jin-Min
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.5
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    • pp.364-369
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    • 2011
  • Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by $7.1{\times}10^1$. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.