• 제목/요약/키워드: High Voltage TFT

검색결과 142건 처리시간 0.033초

박막트랜지스터 게이트 절연막 응용을 위한 불화막 특성연구 (The Study of Fluoride Film Properties for Thin Film Transistor Gate Insulator Application)

  • 김도영;최석원;안병재;이준신
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제48권12호
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    • pp.755-760
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    • 1999
  • Various fluoride films were investigated for a gate insulator of thin film transistor application. Conventional oxide containing materials like $SiO_2\;Ta_2O_5\; and \; Al_2O_3$ exhibited high interface states which lead to an increased threshold voltage and poor stability of TFT. In this paper, we investigated gate insulators using a binary matrix system of fluoride such as $CaF_2,\; SrF_2\; MgF_2,\; and\; BaF_2$. These materials exhibited an improvement in lattice mismatch, interface state and electrical stability. MIM and MIS devices were employed for an electrical characterization and structural property examination. Among the various fluoride materials, $CaF_2$ film showed an excellent lattice mismatch of 5%, breakdown electric field higher than 1.2MV/cm and leakage current density of $10^{-7}A/cm^2$. MIS diode having $Ca_2$ film as an insulation layer exhibited the interface states as low as $1.58\times10^{11}cm^{-2}eV^{-1}$. This paper probes a possibility of new gate insulator materials for TFT applications.

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피에조를 이용한 코로나 방전과 펄스교류 코로나 방전을 이용한 정전기 제거장치의 비교 연구 (A Comparative Study on the Electrostatic Eliminator of Piezo Type Ionizer and Pulse AC Corona Type Ionizer)

  • 권승열;이동훈;최재욱
    • 한국안전학회지
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    • 제24권6호
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    • pp.50-54
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    • 2009
  • Ionizer is used for improving manufacturing process and reducing inferior goods in the clean room. As a general rule, neutralization of the electrostatic charge is most important to make TFT-LCD, PDP and OLED. Pulse AC-static eliminator with output voltage of about 10.5kV has been used these days as neutralization device. But this device has a problem with lower performance which was caused by particles-adhesion on the electrode when it has been used for a long time. So we studied to solve the problem with lower performance using high Frequency(72kHz) static eliminator which was produced by Piezo transformer device, and compared Pulse-AC type with Piezo-electronic device such as decay time and ion balance for 10 weeks periods. As a result of this study, we found that Piezo transformer device has been maintained normal condition for 10 weeks. Also, we made the rule by this study, normally Piezo transformer device has to clean the electrode during every 11th weeks.

Evaluation of Flexible Complementary Inverters Based on Pentacene and IGZO Thin Film Transistors

  • Kim, D.I.;Hwang, B.U.;Jeon, H.S.;Bae, B.S.;Lee, H.J.;Lee, N.E.
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.154-154
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    • 2012
  • Flexible complementary inverters based on thin-film transistors (TFTs) are important because they have low power consumption and high voltage gain compared to single type circuits. We have manufactured flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The circuits were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. The characteristics of TFTs and inverters were evaluated at different bending radii. The applied strain led to change in voltage transfer characteristics of complementary inverters as well as source-drain saturation current, field effect mobility and threshold voltage of TFTs. The switching threshold voltage of fabricated inverters was decreased with increasing bending radius, which is related to change in parameters of TFTs. Throughout the bending experiments, relationship between circuit performance and TFT characteristics under mechanical deformation could be elucidated.

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InGaZnO active layer 두께에 따른 thin-film transistor 전기적인 영향

  • 우창호;김영이;안철현;김동찬;공보현;배영숙;서동규;조형균
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
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    • pp.5-5
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    • 2009
  • Thin-film-transistors (TFTs) that can be prepared at low temperatures have attracted much attention because of the great potential for transparent and flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited due to low field-effect mobility and rapid degradation after exposing to air. Alternative approach is the use of amorphous oxide semiconductors as a channel. Amorphous oxide semiconductors (AOSs) based TFTs showed the fast technological development, because AOS films can be fabricated at room temperature and exhibit the possibility in application like flexible display, electronic paper, and larges solar cells. Among the various AOSs, a-IGZO has lots of advantages because it has high channel mobility, uniform surface roughness and good transparency. [1] The high mobility is attributed to the overlap of spherical s-orbital of the heavy post-transition metal cations. This study demonstrated the effect of the variation in channel thickness from 30nm to 200nm on the TFT device performance. When the thickness was increased, turn-on voltage and subthreshold swing was decreased. The a-IGZO channels and source/drain metals were deposited with shadow mask. The a-IGZO channel layer was deposited on $SiO_2$/p-Si substrates by RF magnetron sputtering, where RF power is 150W. And working pressure is 3m Torr, at $O_2/Ar$ (2/28 sccm) atmosphere. The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. Finally, Al (150nm) as a gate metal was thermal-evaporated. TFT devices were heat-treated in a furnace at 250 $^{\circ}C$ and nitrogen atmosphere for 1hour. The electrical properties of the TFTs were measured using a probe-station. The TFT with channel thickness of 150nm exhibits a good subthreshold swing (SS) of 0.72 V/decade and on-off ratio of $1{\times}10^8$. The field effect mobility and threshold voltage were evaluated as 7.2 and 8 V, respectively.

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Experimental Investigation of Physical Mechanism for Asymmetrical Degradation in Amorphous InGaZnO Thin-film Transistors under Simultaneous Gate and Drain Bias Stresses

  • Jeong, Chan-Yong;Kim, Hee-Joong;Lee, Jeong-Hwan;Kwon, Hyuck-In
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권2호
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    • pp.239-244
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    • 2017
  • We experimentally investigate the physical mechanism for asymmetrical degradation in amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) under simultaneous gate and drain bias stresses. The transfer curves exhibit an asymmetrical negative shift after the application of gate-to-source ($V_{GS}$) and drain-to-source ($V_{DS}$) bias stresses of ($V_{GS}=24V$, $V_{DS}=15.9V$) and ($V_{GS}=22V$, $V_{DS}=20V$), but the asymmetrical degradation is more significant after the bias stress ($V_{GS}$, $V_{DS}$) of (22 V, 20 V) nevertheless the vertical electric field at the source is higher under the bias stress ($V_{GS}$, $V_{DS}$) of (24 V, 15.9 V) than (22 V, 20 V). By using the modified external load resistance method, we extract the source contact resistance ($R_S$) and the voltage drop at $R_S$ ($V_{S,\;drop}$) in the fabricated a-IGZO TFT under both bias stresses. A significantly higher RS and $V_{S,\;drop}$ are extracted under the bias stress ($V_{GS}$, $V_{DS}$) of (22 V, 20V) than (24 V, 15.9 V), which implies that the high horizontal electric field across the source contact due to the large voltage drop at the reverse biased Schottky junction is the dominant physical mechanism causing the asymmetrical degradation of a-IGZO TFTs under simultaneous gate and drain bias stresses.

ICP-CVD 반응기 내에서 $N_2O$ 플라즈마 산화법을 이용하여 증착된 ultra thin silicon oxynitride films 에 관한 연구 (Study on the ultra thin film of silicon oxyinitride deposited by plasma - assisted $N_2O$ oxidation in ICP-CVD reactor)

  • 황성현;정성욱;이준신
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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    • pp.161-162
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    • 2006
  • Scaling rules for TFT application devices have led to the necessity of ultra thin dielectric films and high-k dielectric layers. In this paper, The advantages of high concentration of nitrogen in silicon oxide layer deposited by using $N_2O$ in Inductively Coupled Plasma Chemical Vapor Deposition (ICP-CVD) reported about Ellipsometric measurement, Capacitance-Voltage characterization and processing conditions.

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Influence of Oxygen Partial Pressure on ZnO Thin Films for Thin Film Transistors

  • Kim, Jae-Won;Kim, Ji-Hong;Roh, Ji-Hyoung;Lee, Kyung-Joo;Moon, Sung-Joon;Do, Kang-Min;Park, Jae-Ho;Jo, Seul-Ki;Shin, Ju-Hong;Yer, In-Hyung;Koo, Sang-Mo;Moon, Byung-Moo
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.106-106
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    • 2011
  • Recently, zinc oxide (ZnO) thin films have attracted great attention as a promising candidate for various electronic applications such as transparent electrodes, thin film transistors, and optoelectronic devices. ZnO thin films have a wide band gap energy of 3.37 eV and transparency in visible region. Moreover, ZnO thin films can be deposited in a poly-crystalline form even at room temperature, extending the choice of substrates including even plastics. Therefore, it is possible to realize thin film transistors by using ZnO thin films as the active channel layer. In this work, we investigated influence of oxygen partial pressure on ZnO thin films and fabricated ZnO-based thin film transistors. ZnO thin films were deposited on glass substrates by using a pulsed laser deposition technique in various oxygen partial pressures from 20 to 100 mTorr at room temperature. X-ray diffraction (XRD), transmission line method (TLM), and UV-Vis spectroscopy were employed to study the structural, electrical, and optical properties of the ZnO thin films. As a result, 80 mTorr was optimal condition for active layer of thin film transistors, since the active layer of thin film transistors needs high resistivity to achieve low off-current and high on-off ratio. The fabricated ZnO-based thin film transistors operated in the enhancement mode with high field effect mobility and low threshold voltage.

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Solution-processed Dielectric and Quantum Dot Thin Films for Electronic and Photonic Applications

  • 정현담
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
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    • pp.37-37
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    • 2010
  • Silicate-silsesquioxane or siloxane-silsesquioxane hybrid thin films are strong candidates as matrix materials for ultra low dielectric constant (low-k) thin films. We synthesized the silicate-silsesquioxane hybrid resins from tetraethoxyorthosilicate (TEOS) and methyltrimethoxysilane (MTMS) through hydrolysis and condensation polymerization by changing their molar ratios ([TEOS]:[MTMS] = 7:3, 5:5, and 3:7), spin-coating on Si(100) wafers. In the case of [TEOS]:[MTMS] 7:3, the dielectric permittivity value of the resultant thin film was measured at 4.30, exceeding that of the thermal oxide (3.9). This high value was thought to be due to Si-OH groups inside the film and more extensive studies were performed in terms of electronic, ionic, and orientational polarizations using Debye equation. The relationship between the mechanical properties and the synthetic conditions of the silicate-silsesquioxane precursors was also investigated. The synthetic conditions of the low-k films have to be chosen to meet both the low orientational polarization and high mechanical properties requirements. In addition, we have investigated a new solution-based approach to the synthesis of semiconducting chalcogenide films for use in thin-film transistor (TFT) devices, in an attempt to develop a simple and robust solution process for the synthesis of inorganic semiconductors. Our material design strategy is to use a sol-gel reaction to carry out the deposition of a spin-coated CdS film, which can then be converted to a xerogel material. These devices were found to exhibit n-channel TFT characteristics with an excellent field-effect mobility (a saturation mobility of ${\sim}\;48\;cm^2V^{-1}s^{-1}$) and low voltage operation (< 5 V). These results show that these semiconducting thin film materials can be used in low-cost and high-performance printable electronics.

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비정질 IZTO기반의 투명 박막 트렌지스터 특성 (Characteristics of amorphous IZTO-based transparent thin film transistors)

  • 신한재;이근영;한동철;이도경
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.151-151
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    • 2009
  • Recently, there has been increasing interest in amorphous oxide semiconductors to find alternative materials for an amorphous silicon or organic semiconductor layer as a channel in thin film transistors(TFTs) for transparent electronic devices owing to their high mobility and low photo-sensitivity. The fabriction of amorphous oxide-based TFTs at room temperature on plastic substrates is a key technology to realize transparent flexible electronics. Amorphous oxides allows for controllable conductivity, which permits it to be used both as a transparent semiconductor or conductor, and so to be used both as active and source/drain layers in TFTs. One of the materials that is being responsible for this revolution in the electronics is indium-zinc-tin oxide(IZTO). Since this is relatively new material, it is important to study the properties of room-temperature deposited IZTO thin films and exploration in a possible integration of the material in flexible TFT devices. In this research, we deposited IZTO thin films on polyethylene naphthalate substrate at room temperature by using magnetron sputtering system and investigated their properties. Furthermore, we revealed the fabrication and characteristics of top-gate-type transparent TFTs with IZTO layers, seen in Fig. 1. The experimental results show that by varying the oxygen flow rate during deposition, it can be prepared the IZTO thin films of two-types; One a conductive film that exhibits a resistivity of $2\times10^{-4}$ ohm${\cdot}$cm; the other, semiconductor film with a resistivity of 9 ohm${\cdot}$cm. The TFT devices with IZTO layers are optically transparent in visible region and operate in enhancement mode. The threshold voltage, field effect mobility, on-off current ratio, and sub-threshold slope of the TFT are -0.5 V, $7.2\;cm^2/Vs$, $\sim10^7$ and 0.2 V/decade, respectively. These results will contribute to applications of select TFT to transparent flexible electronics.

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Co-sputtered $HfO_2-Al_2O_3$을 게이트 절연막으로 적용한 IZO 기반 Oxide-TFT 소자의 성능 향상 (Enhanced Device Performance of IZO-based oxide-TFTs with Co-sputtered $HfO_2-Al_2O_3$ Gate Dielectrics)

  • 손희근;양정일;조동규;우상현;이동희;이문석
    • 대한전자공학회논문지SD
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    • 제48권6호
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    • pp.1-6
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    • 2011
  • 투명 산화물 반도체 (Transparent Oxide-TFT)를 활성층과 소스/드레인, 게이트 전극층으로 동시에 사용한 비결정 indium zinc oxide (a-IZO), 절연층으로 co-sputtered $HfO_2-Al_2O_3$ (HfAIO)을 적용하여 실온에서 RF-magnetron 스퍼터 공정에 의해 제작하였다. TFT의 게이트 절연막으로써 $HfO_2$ 는 그 높은 유전상수( > 20)에도 불구하고 미세결정구조와 작은 에너지 밴드갭 (5.31eV) 으로 부터 기인한 거친계면특성, 높은 누설전류의 단점을 가지고 있다. 본 연구에서는, 어떠한 추가적인 열처리 공정 없이 co-sputtering에 의해 $HfO_2$$Al_2O_3$를 동시에 증착함으로써 구조적, 전기적 특성이 TFT 의 절연막으로 더욱 적합하게 향상되어진 $HfO_2$ 박막의 변화를 x-ray diffraction (XRD), atomic force microscopy (AFM) and spectroscopic ellipsometer (SE)를 통해 분석하였다. XRD 분석은 기존 $HfO_2$ 의 미세결정 구조가 $Al_2O_3$와의 co-sputter에 의해 비결정 구조로 변한 것을 확인 시켜 주었고, AFM 분석을 통해 $HfO_2$ 의 표면 거칠기를 비교할 수 있는 RMS 값이 2.979 nm 인 것에 반해 HfAIO의 경우 0.490 nm로 향상된 것을 확인하였다. 또한 SE 분석을 통해 $HfO_2$ 의 에너지 밴드 갭 5.17 eV 이 HfAIO 의 에너지 밴드 갭 5.42 eV 로 향상 되어진 것을 알 수 있었다. 자유 전자 농도와 그에 따른 비저항도를 적절하게 조절한 활성층/전극층 으로써의 IZO 물질과 게이트 절연층으로써 co-sputtered HfAIO를 적용하여 제작한 Oxide-TFT 의 전기적 특성은 이동도 $10cm^2/V{\cdot}s$이상, 문턱전압 2 V 이하, 전류점멸비 $10^5$ 이상, 최대 전류량 2 mA 이상을 보여주었다.