• Title/Summary/Keyword: High Level Signal

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Design of the Resistive Mixer MMIC with high linearity and LO-RF isolation (고선형성과 높은 LO-RF 격리도를 갖는 새로운 구조의 저항성 Mixer MMIC 설계)

  • Lee, Kyoung-Hak
    • Journal of Satellite, Information and Communications
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    • v.9 no.2
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    • pp.7-11
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    • 2014
  • In this paper, we designed resistive MMIC mixer using $0.5{\mu}m$ p-HEMT process. This Mixer is designed to have a similar performance in -4 ~ 4 dBm local oscillator signal power level and to maintain a constant conversion loss and linear performance due to the variation of local signal. In order to have such characteristics, we designed new feedback circuit topology by using FET, and minimized performance change for LO signal power level variation, also obtain MMIC mixer characteristics which is able to apply in wideband. In the design result, When the LO signal power is -4 ~ 4 dBm, there was 6 dB conversion loss and it came up with the excellent result that IIP3 got over 30 dBm in 0.5 ~ 2.6GHz frequency band.

The Study on Variation Minimization Method of Reflection Signal Level for High Precision Laser Displacement (고정밀 레이저 변위를 위한 레이저 반사 신호 레벨의 변동 최소화 기법에 관한 연구)

  • Bae, Young-Chul;Park, Jong-Bae;Cho, Eui-Joo;Kang, Ki-Woong;Kang, Keon-Il;Kim, Hyeon-Woo;Kim, Eun-Ju
    • The Journal of the Korea institute of electronic communication sciences
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    • v.3 no.1
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    • pp.12-18
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    • 2008
  • In this research, we proposed a method for high precision measurement than laser displacement measurement. The proposed method finds the causes of error due to change in reflected laser signal level reflected from an object and compensation, and we designed this by applying laser displacement meter.

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Recognition of Individual Cattle by His and /or Her Voice

  • Yoshio, Ikeda;Yohei, Ishii
    • Proceedings of the Korean Society for Agricultural Machinery Conference
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    • 1998.06b
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    • pp.270-275
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    • 1998
  • It was assumed that the voice of cattle is generated with the virtual white noise through the digital filter called the linear prediction filter, and filter parameters (prediction coefficients) were estimated by the maximum entropy method (MEM) , using the sound signal of the animal . The feature planes were defined by the pairs of two parameters selected appropriately from these parameters. The cattle voices were divided into three levels, that is the high, medium and low levels according to their total power equivalent to the variances of the sound signal . It was found that the straight lines could be used for recognizing tow cow and one calf for high level voices. For high and medium level voices, however, it was difficult or impossible to recognize individual cattle on the parameters planes.

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Development of Traffic Simulation Using High Level Architecture/Run Time Infrastructure (HLA/RTI 기반의 교통류 분산 시뮬레이션 모형에 관한 연구)

  • Lee, Sang-Heon
    • Journal of the Korea Society for Simulation
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    • v.14 no.3
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    • pp.79-90
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    • 2005
  • There are plenty of optimization models for the signal-system of a single intersection and area traffic. Some of those models are adopted for the real traffic signal control system. The simulators for a single crossroad have been developed, so that we could evaluate optimization models and traffic control systems. However, the simulators for the area traffic are still being developed. Therefore, there are many limitations in the analysis and evaluation for area traffic control system. The area traffic is consisted of several intersections which are very complicated and many traffic strategies are adopted for the control system. This paper features an effective area traffic control system based on the High Lever Architecture(HLA). In this paper, we discuss the design of HLA-based area traffic control simulation. We describe technical motivations for the HLA, the key elements of the architecture and how they are minimum and essential to the goal of reuse and interoperability. A distributed simulation with HLA/RTI provides stable and satisfactory experimental results. Moreover, the prototype traffic control system provides reliable accomplishment compared to the NETSIM and TRANSYT-7F models.

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A 2.5Gbps High speed driver for a next generation connector (차세대 연결망용 2-SGbps급 고속 드라이버)

  • 남기현;김수원
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.53-56
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    • 2001
  • With the ever increasing clock frequency and integration level of CMOS circuits, I/O(input/output) and interconnect issues are becoming a growing concern. In this thesis, we propose the 2.5Gbps high speed input driver This driver consists of four different blocks, which are the high speed serializer , PECL(pseudo emitter coupled logic) Line Driver, PLL(phase lock loop) and pre-emphasis signal generator. The proposed pre-emphasis block will compensate the high frequency components of the 2.5Gbps data signal. Using the pre-emphasis block, we can obtain 2.5Gbps data signal with differential peak to peak voltage about 900 m $V_{p.p}$ This driver structure is on fabrication in 2.5v/10.25um 1poly, 5metal CMOS process.

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A Study on Correlation between A/F and ion signal in a Constant-Volume Chamber Using Spark-plug Ionization Probe Itself (정적챔버에서 스파크 플러그 이온프로브를 이용한 공연비와 이온신호와의 상관관계에 대한 연구)

  • Park, Jong-Il;Chun, Kwang-Min;Hahn, Jae-Won;Park, Chul-Woong
    • 한국연소학회:학술대회논문집
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    • 2002.11a
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    • pp.223-229
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    • 2002
  • Spark plug ionization signal could be useful in an internal combustion engine as a feedback signal for combustion diagnostics such as misfire detection, knocking detection and lambda control, but the signal has high level of cyclic fluctuation in an internal combustion engine due to residual gas, pressure, temperature, mixture composition in the spark gap. Because of this reason it is very difficult to apply ion signal to commercial engine control. In this Study, a correlation between A/F and spark plug ionization signal was studied in a constant volume chamber. Constant volume chamber with gas phase fuel(Propane) has homogeneous fuel composition , no mixture flow, same pressure and temperature on each test. The results show that mean chemi-ion signal has the highest correlation with A/F and intial pressure change has on effect on the thermal-ion signal and not on chemi-ion signal.

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High-Isolation SPDT RF Switch Using Inductive Switching and Leakage Signal Cancellation

  • Ha, Byeong Wan;Cho, Choon Sik
    • Journal of electromagnetic engineering and science
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    • v.14 no.4
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    • pp.411-414
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    • 2014
  • A switch is one of the most useful circuits for controlling the path of signal transmission. It can be added to digital circuits to create a kind of gate-level device and it can also save information into memory. In RF subsystems, a switch is used in a different way than its general role in digital circuits. The most important characteristic to consider when designing an RF switch is keeping the isolation as high as possible while also keeping insertion loss as low as possible. For high isolation, we propose leakage signal cancellation and inductive switching for designing a singlepole double-throw (SPDT) RF switch. By using the proposed method, an isolation level of more than 23 dB can be achieved. Furthermore, the heterojunction bipolar transistor (HBT) process is used in the RF switch design to keep the insertion loss low. It is demonstrated that the proposed RF switch has an insertion loss of less than 2 dB. The RF switch operates from 1 to 8 GHz based on the $0.18-{\mu}m$ SiGe HBT process, taking up an area of $0.3mm^2$.

Through Silicon Stack (TSS) Assembly for Wide IO Memory to Logic Devices Integration and Its Signal Integrity Challenges

  • Shin, Jaemin;Kim, Dong Wook
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.2
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    • pp.51-57
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    • 2013
  • The current expanding mobile markets incessantly demands small form factor, low power consumption and high aggregate throughput for silicon-level integration such as memory to logic system. One of emerging solution for meeting this high market demand is 3D through silicon stacking (TSS) technology. Main challenges to bring 3D TSS technology to the volume production level are establishing a cost effective supply chain and building a reliable manufacturing processes. In addition, this technology inherently help increase number of IOs and shorten interconnect length. With those benefits, however, potential signal and power integrity risks are also elevated; increase in PDN inductance, channel loss on substrate, crosstalk and parasitic capacitance. This paper will report recent progress of wide IO memory to high count TSV logic device assembly development work. 28 nm node TSV test vehicles were fabricated by the foundry and assembled. Successful integration of memory wide IO chip with less than a millimeter package thickness form factor was achieved. For this successful integration, we discussed potential signal and power integrity challenges. This report demonstrated functional wide IO memory to 28 nm logic device assembly using 3D package architecture with such a thin form factor.

Analog-Digital Signal Processing System Based on TMS320F28377D (TMS320F28377D 기반 아날로그-디지털 신호 처리 시스템)

  • Kim, Hyoung-Woo;Nam, Ki Gon;Choi, Joon-Young
    • IEMEK Journal of Embedded Systems and Applications
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    • v.14 no.1
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    • pp.33-41
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    • 2019
  • We propose an embedded solution to design a high-speed and high-accuracy 16bit analog-digital signal processing interface for the control systems using various external analog signals. Choosing TMS320F28377D micro controller unit (MCU) featuring high-performance processing in the 32-bit floating point operation, low power consumption, and various I/O device supports, we design and build the proposed system that supports both 16-bit analog-digital converter (ADC) interface and high precision digital-analog converter (DAC) interface. The ADC receives voltage-level differential signals from fully differential amplifiers, and the DAC communicates with MCU through 50 MHz bandwidth high-fast serial peripheral interface (SPI). We port the boot loader and device drivers to the implemented board, and construct the firmware development environment for the application programming. The performance of the entire implemented system is demonstrated by analog-digital signal processing tests, and is verified by comparing the test results with those of existing similar systems.