• Title/Summary/Keyword: HfSiO

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Characterization of SWCNT Field Effect Transistor via Edison Simulation

  • Piao, Mingxing;Lee, Sang-Jin;Na, In-Yeob
    • Proceeding of EDISON Challenge
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    • 2013.04a
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    • pp.260-263
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    • 2013
  • A semiconducting single-walled carbon nanotube (SWCNT) field-effect transistor (FET) in a top-gate model was constructed. The effect of different high-${\kappa}$ dielectric materials ($Al_2O_3$, $HfO_2$ and HfSiON) and various temperatures with a wide range from 50K to 500K on the performance of such nominal device were investigated. Several key device parameters including the on/off ratio of the current, transconductance ($g_m$), subthreshold swing, and carrier mobility were used to evaluate the device performance. The simulated results fit well with the experiment results previously published.

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Selective Chemical Wet Etching of Si0.8Ge0.2/Si Multilayer

  • Kil, Yeon-Ho;Yang, Jong-Han;Kang, Sukil;Jeong, Tae Soo;Kim, Taek Sung;Shim, Kyu-Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.6
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    • pp.668-675
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    • 2013
  • We investigate the effect of the ageing time and etching time on the etching rate of SiGe mixed etching solution, namely 1 vp HF (6%), 2 vp $H_2O_2$ (30%) and 3 vp $CH_3COOH$ (99.8%). For this etching solution, we found that the etch rate of SiGe layer is saturated after the ageing time of 72 hours, and the selectivity of $Si_{0.8}Ge_{0.2}$ layer and Si layer is 20:1 at ageing time of 72 hours. The collapse was appeared at the etching time of 9min with etching solution of after saturation ageing time.

Electrical characteristics of high-k stack layered tunnel barriers with Post-Rapid thermal Annealing (PRA) for nonvolatile memory application

  • Hwang, Yeong-Hyeon;Yu, Hui-Uk;Son, Jeong-U;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.186-186
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    • 2010
  • 소자의 축소화에 따라 floating gate 형의 flash 메모리 소자는 얇은 게이트 절연막 등의 이유로, 이웃 셀 간의 커플링 및 게이트 누설 전류와 같은 문제점을 지니고 있다. 이러한 문제점을 극복하기 위해 charge trap flash 메모리 (CTF) 소자가 연구되고 있지만, CTF 메모리 소자는 쓰기/지우기 속도와 데이터 보존 성능간의 trade-off 관계와 같은 문제점을 지니고 있다. 최근, 이를 극복하기 위한 방안으로, 다른 유전율을 갖는 유전체들을 적층시킨 터널 절연막을 이용한 Tunnel Barrier Engineered (TBE) 기술이 주목 받고 있다. 따라서, 본 논문에서는 TBE 기술을 적용한 MIS-capacitor를 높은 유전율을 가지는 Al2O3와 HfO2를 이용하여 제작하였다. 이를 위해 먼저 Si 기판 위에 Al2O3 /HfO2 /Al2O3 (AHA)를 Atomic Layer Deposition (ALD) 방법으로 약 2/1/3 nm의 두께를 가지도록 증착 하였고, Aluminum을 150 nm 증착 하여 게이트 전극으로 이용하였다. Capacitance-Voltage와 Current-Voltage 특성을 측정, 분석함으로써, AHA 구조를 가지는 터널 절연막의 전기적인 특성을 확인 하였다. 또한, high-k 물질을 이용한 터널 절연막을 급속 열처리 공정 (Rapid Thermal Annealing-RTA) 과 H2/N2분위기에서 후속열처리 공정 (Post-RTA)을 통하여 전기적인 특성을 개선 시켰다. 적층된 터널 절연막은 열처리를 통해 터널링 전류의 민감도의 향상과 함께 누설전류가 감소됨으로서 우수한 전기적인 특성이 나타남을 확인하였으며, 적층된 터널 절연막 구조와 적절한 열처리를 이용하여 빠른 쓰기/지우기 속도와 전기적인 특성이 향상된 비휘발성 메모리 소자를 기대할 수 있다.

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TOF-MEIS System을 이용한 Ultra Thin Film 및 Composition and the Core/Shell Structure of Quantum Dot 분석

  • Jeong, Gang-Won;Kim, Jae-Yeong;Mun, Dae-Won
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.284-284
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    • 2013
  • 중 에너지 이온 산란 분석법(Medium Energy Ion Scattering Spectrometer, MEIS)은 50~500 keV로 이온을 가속 후 시료에 입사시켜 시료의 원자와 핵간 충돌로 산란되는 일차이온의 에너지를 측정하여 시료를 분석하는 기법으로, 원자층의 깊이 분해능으로 초박막의 표면 계면의 조성과 구조를 분석 할수 있는 유용한 미세 분석기술이다. 본 실험에서 에너지 70~100 keV의 He+ 이온을 사용하여 Pulse Width 1 ns의 Pulsed ion beam을 만들어 Start 신호로 사용하고 Delay-line-detector에 검출된 신호를 End 신호를 이용한 TOF-MEIS System을 개발하였다. 활용 가능한 분석시편으로 Ultra thin film 시편으로 1, 1.5, 2, 2.5, 3, 4 nm의 HfO2, 1.8, 4nm의 SiO2 시편을 분석 하였으며 Ultra Shallow Junction 시편으로 As Doped Si, Cs Doped Si 시편 및 Composition, Core/shell 구조의 Q-dot 시편으로 CdSe, CdSe/ZnS등 다양한 분석 실험을 진행 하였다. Composition, Core/shell 구조의 Q-dot 시편은 Diamond Like Carbon(DLC)의 Substrate에 Mono-layer로 형성하여 분석하였다.

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Change of phase transformation and bond strength of Y-TZP with various hydrofluoric acid etching

  • Mi-Kyung Yu;Eun-Jin Oh;Myung-Jin Lim;Kwang-Won Lee
    • Restorative Dentistry and Endodontics
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    • v.46 no.4
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    • pp.54.1-54.10
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    • 2021
  • Objectives: The purpose of this study was to quantify phase transformation after hydrofluoric acid (HF) etching at various concentrations on the surface of yttria-stabilized tetragonal zirconia polycrystal (Y-TZP), and to evaluate changes in bonding strength before and after thermal cycling. Materials and Methods: A group whose Y-TZP surface was treated with tribochemical silica abrasion (TS) was used as the control. Y-TZP specimens from each experimental group were etched with 5%, 10%, 20%, and 40% HF solutions at room temperature for 10 minutes. First, to quantify the phase transformation, Y-TZP specimens (n = 5) treated with TS, 5%, 10%, 20% and 40% HF solutions were subjected to X-ray diffraction. Second, to evaluate the change in bond strength before and after thermal cycling, zirconia primer and MDP-containing resin cement were sequentially applied to the Y-TZP specimen. After 5,000 thermal cycles for half of the Y-TZP specimens, shear bond strength was measured for all experimental groups (n = 10). Results: The monoclinic phase content in the 40% HF-treated group was higher than that of the 5%, 10%, and 20% HF-treated groups, but lower than that of TS-treated group (p < 0.05). The 40% HF-treated group showed significantly higher bonding strength than the TS, 5%, and 10% HF-treated groups, even after thermal cycling (p < 0.05). Conclusions: Through this experiment, the group treated with SiO2 containing air-borne abrasion on the Y-TZP surface showed higher phase transformation and higher reduction in bonding strength after thermal cycling compared to the group treated with high concentration HF.

Characteristics of $_{(1-x)}Ta_2O_{5-x}TiO_2$ thin film at various annealing temperature by CVD (CVD법으로 제작한 $_{(1-x)}Ta_2O_{5-x}TiO_2$ 박막의 열처리 온도에 따른 특성변화)

  • 강필규;진정근;강호재;노대호;안재우;변동진
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.11a
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    • pp.171-171
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    • 2003
  • 공정기술의 향상으로 DRAM(dynamic random acess memory)의 고집적화가 이루어지고 있으며, 각 개별소자 및 셀 영역의 점유면적의 감소가 요구되어지고 있다. 따라서 기존에 사용하던 NO (Si$_3$N$_4$/SiO$_2$)박막보다 유전율이 높은 고유전물질에 대한 연구가 진행되고 있다. Ta$_2$O$_{5}$, $Y_2$O$_3$, HfO$_2$, ZrO$_2$,Nb$_2$O$_{5}$, BaTiO$_3$, SrTiO$_3$ 및 (BaSr)TiO등이 고유전물질로 연구되고 있는데 그 중 공정의 안정성, 누설전류의 우수성으로 인해 Ta$_2$O$_{5}$이 많이 연구되고 있다. 본 실험에서는 TiO$_2$가 8 mol%가 첨가된 Ta$_2$O$_{5}$의 열처리 온도에 따른 전기적, 유전특성을 살펴보려고 한다살펴보려고 한다

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Properties of Dy-doped $La_2O_3$ buffer layer for Fe-FETs with Metal/Ferroelectric/Insulator/Si structure

  • Im, Jong-Hyun;Kim, Kwi-Jung;Jeong, Shin-Woo;Jung, Jong-Ill;Han, Hui-Seong;Jeon, Ho-Seung;Park, Byung-Eun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.140-140
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    • 2009
  • The Metal-ferroelectric-semiconductor (MFS) structure has superior advantages such as high density integration and non-destructive read-out operation. However, to obtain the desired electrical characteristics of an MFS structure is difficult because of interfacial reactions between ferroelectric thin film and Si substrate. As an alternative solution, the MFS structure with buffer insulating layer, i.e. metal-ferroelectric-insulator-semiconductor (MFIS), has been proposed to improve the interfacial properties. Insulators investigated as a buffer insulator in a MFIS structure, include $Ta_2O_5$, $HfO_2$, and $ZrO_2$ which are mainly high-k dielectrics. In this study, we prepared the Dy-doped $La_2O_3$ solution buffer layer as an insulator. To form a Dy-doped $La_2O_3$ buffer layer, the solution was spin-coated on p-type Si(100) wafer. The coated Dy-doped $La_2O_3$ films were annealed at various temperatures by rapid thermal annealing (RTA). To evaluate electrical properties, Au electrodes were thermally evaporated onto the surface of the samples. Finally, we observed the surface morphology and crystallization quality of the Dy-doped $La_2O_3$ on Si using atomic force microscopy (AFM) and x-ray diffractometer (XRD), respectively. To evaluate electrical properties, the capacitance-voltage (C-V) and current density-voltage (J-V) characteristics of Au/Dy-doped La2O3/Si structure were measured.

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Regular Distribution of -OH Fragments on a Si (001)-c(4×2) Surface by Dissociation of Water Molecules (물 분자의 해리에 의한 Si (001)-c(4×2) 표면에서의 수산화기의 균일한 분포)

  • Lee, Soo-Kyung;Oh, Hyun-Chul;Kim, Dae-Hee;Jeong, Yong-Chan;Baek, Seung-Bin;Kim, Yeong-Cheol
    • Korean Journal of Materials Research
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    • v.20 no.9
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    • pp.457-462
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    • 2010
  • Adsorption of a water molecule on a Si (001) surface and its dissociation were studied using density functional theory to study the distribution of -OH fragments on the Si surface. The Si (001) surface was composed of Si dimers, which buckle in a zigzag pattern below the order-disorder transition temperature to reduce the surface energy. When a water molecule approached the Si surface, the O atom of the water molecule favored the down-buckled Si atom, and the H atom of the water molecule favored the up-buckled Si atom. This is explained by the attractions between the negatively charged O of the water and the positively charged down-buckled Si atom and between the positively charged H of the water and the negatively charged up-buckled Si atom. Following the adsorption of the first water molecule on the surface, a second water molecule adsorbed on either the inter-dimer or intra-dimer site of the Si dimer. The dipole-dipole interaction of the two adsorbed water molecules led to the formation of the water dimer, and the dissociation of the water molecules occurred easily below the order-disorder transition temperature. Therefore, the 1/2 monolayer of -OH on the water-terminated Si (001) surface shows a regular distribution. The results shed light on the atomic layer deposition process of alternate gate dielectric materials, such as $HfO_2$.

Improvement of carrier transport in silicon MOSFETs by using h-BN decorated dielectric

  • Liu, Xiaochi;Hwang, Euyheon;Yoo, Won Jong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2013.05a
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    • pp.97-97
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    • 2013
  • We present a comprehensive study on the integration of h-BN with silicon MOSFET. Temperature dependent mobility modeling is used to discern the effects of top-gate dielectric on carrier transport and identify limiting factors of the system. The result indicates that coulomb scattering and surface roughness scattering are the dominant scattering mechanisms for silicon MOSFETs at relatively low temperature. Interposing a layer of h-BN between $SiO_2$ and Si effectively weakens coulomb scattering by separating carriers in the silicon inversion layer from the charged centers as 2-dimensional h-BN is relatively inert and is expected to be free of dangling bonds or surface charge traps owing to the strong, in-plane, ionic bonding of the planar hexagonal lattice structure, thus leading to a significant improvement in mobility relative to undecorated system. Furthermore, the atomically planar surface of h-BN also suppresses surface roughness scattering in this Si MOSFET system, resulting in a monotonously increasing mobility curve along with gate voltage, which is different from the traditional one with a extremum in a certain voltage. Alternatively, high-k dielectrics can lead to enhanced transport properties through dielectric screening. Modeling indicates that we can achieve even higher mobility by using h-BN decorated $HfO_2$ as gate dielectric in silicon MOSFETs instead of h-BN decorated $SiO_2$.

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Improvement of Sealing Property of Electrostatic Chuck by Applying Polysilazane Sealant (폴리실라잔계 실란트를 이용한 정전척 실링특성 향상 연구)

  • Choi, Jaeyoung;Park, Hyunsu;Son, Min Kyu;Jeong, Chang-oh;Kim, Woo-Byoung
    • Journal of Surface Science and Engineering
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    • v.49 no.6
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    • pp.567-574
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    • 2016
  • We have analyzed chemical properties of polysiloxane and polysilazane films, respectively, as sealing materials for electrostatic chuck (ESC) and have investigated the possibility of polysilazane as an alternative sealant to polysiloxane. It has been revealed that Si-O with organic bonding ($Si-CH_3$) existed in polysiloxane films compared to only pure Si-O bonding in polysilazane films. The sealing property of polysilazane has been found outstanding even in a short time of application. In the polysiloxane films containing $H_2O$, pin holes have been found possibly due to $CO_2$ gas evolution, and low adhesion with Si substrate has been observed after heat stress test in connection with the existence of organic bonding. After acid resistance test in 0.5 vol.% HF, 68 wt.% $HNO_3$, and 37 wt.% HCl solution, polyilazane films have shown a longer survival times. Compared to the conventional polysiloxane sealant, polysilazane is expected as a new sealing material because of good thermal and chemical stability.