• Journal of Power Electronics
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• v.18 no.5
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• pp.1523-1535
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• 2018

High-performance Phase-Locked Loops (PLLs) are critical for grid synchronization in grid-tied power electronic applications. In this paper, a new single-phase All Digital Phase-Locked Loop (ADPLL) is proposed. It features fast transient response and good robustness under distorted grid conditions. It is designed for Field Programmable Gate Array (FPGA) implementation. As a result, a high sampling frequency of 1MHz can be obtained. In addition, a new OSG is adopted to track the power frequency, improve the harmonic rejection and remove the dc offset. Unlike previous methods, it avoids extra feedback loop, which results in an enlarged system bandwidth, enhanced stability and improved dynamic performance. In this case, a new parameter optimization method with consideration of loop delay is employed to achieve a fast dynamic response and guarantee accuracy. The Phase Detector (PD) and Voltage Controlled Oscillator (VCO) are realized by a Coordinate Rotation Digital Computer (CORDIC) algorithm and a Direct Digital Synthesis (DDS) block, respectively. The whole PLL system is finally produced on a FPGA. A theoretical analysis and experiments under various distorted grid conditions, including voltage sag, phase jump, frequency step, harmonics distortion, dc offset and combined disturbances, are also presented to verify the fast dynamic response and good robustness of the ADPLL.

• International Journal of Control, Automation, and Systems
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• v.5 no.1
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• pp.24-34
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• 2007

Closed-loop active twist control of integral helicopter rotor blades is investigated in this paper for reducing hub vibration induced in forward flight. A four-bladed fully articulated integral twist-actuated rotor system has been designed and tested successfully in wind tunnel in open-loop actuation. The integral twist deformation of the blades is generated using active fiber composite actuators embedded in the composite blade construction. An analytical framework is developed to examine integrally twisted helicopter blades and their aeroelastic behavior during different flight conditions. This aeroelastic model stems from a three-dimensional electroelastic beam formulation with geometrical-exactness, and is coupled with finite-state dynamic inflow aerodynamics. A system identification methodology that assumes a linear periodic system is adopted to estimate the harmonic transfer function of the rotor system. A vibration minimizing controller is designed based on this result, which implements a classical disturbance rejection algorithm with some modifications. Using the established analytical framework, the closed-loop controller is numerically simulated and the hub vibratory load reduction capability is demonstrated.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.2
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• pp.95-101
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• 2008

This paper presents a novel bandpass filter design method for suppressing spurious response in the GSM band and effectively reducing the overall size with the unbalanced-conditioned metamaterials. Compared to the conventional bandpass filters based on half-or quarter-wave resonators, the CRLH(composite right/left-handed) bandpass filter works excellently in harmonic-suppression by 40$\sim$50 dB and 80 %-miniaturization using the zero-order resonators bridged by Inductive-coupling Inverters suggested first time. The proposed technique, with the equivalent circuit and dispersion diagram, is validated by performance predictions and experiments.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2000.11a
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• pp.997-1001
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• 2000

In this paper, the case studies of reducing rotational errors is theoretically done for a grinding spindle with an active magnetic bearing system. The rotational errors acting on the magnetic bearing spindle are due to mass unbalance of rotor, runout, grinding excitation and unmodeled nonlinear dynamics of electromagnets. For the most case, the electrical runout of sensor target is big even in well finished surface, this runout can cause a rotation error amplified by feedback control system. The adaptiveed forward method based on LMS algorithm is discussed to compensate this kind of runout effects, and investigated its effectiveness by numerical simulation and experimental analysis. The electrical runout form the rear sensor target of grind spindle is about 70$\mu\textrm{m}$ with harmonic frequencies. The rotor orbit size in rear bearing is reduced about to 5$\mu\textrm{m}$ due to 1X and 2X rejection by feedforward control.

• 한국초전도학회:학술대회논문집
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• v.10
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• pp.193-196
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• 2000

A new type low-pass filter design method based on a coupled line and transmission line theory is proposed to suppress harmonics by attenuation poles in the stop band. The design formula are derived using the equivalent circuit of a coupled transmission line. The new low-pass filter structure is shown to have attractive properties such as compact size, wide stop band range and low insertion loss. The seventh-order low-pass filter designed by present method has a cutoff frequency of 0.9 CHz with a 0.01 dB ripple level. The coupled line type low-pass filter with strip line configuration was fabricated by using a high-temperature superconducting (HTS : YBa$_2$Cu$_3$O$_{7-{\delta}}$ thin film on MgO(100) substrate. Since the HTS coupled tine type low-pass filter was proposed with five attenuation poles in stop band such as 1.8, 2.5, 4, 5.5, 6.2 GHz. The fabricated low-pass filter has improved the attenuation characteristics up to seven times of the cutoff frequency.

• Journal of Power Electronics
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• v.13 no.3
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• pp.447-457
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• 2013

For grid-connected LCL-filtered inverters, resonance yields instability and low bandwidth. As a result, careful designs are required. This paper presents a systematic current control structure, where pole assignment consisting of one or more feedbacks is the inner loop, and the outer loop is the direct grid current control. Several other issues are discussed, such as the inner-loop feedback choices, pole-assignment algorithms, robustness and harmonic rejection. Generally, this kind of strategy has three different types according to the inner-loop feedback choices. Among them, a novel pole-assignment algorithm has been proposed, where the inner control maintains four freely-assigned poles which are just two pairs of conjugated poles located at the fundamental and resonance frequencies separately. It has been found that with the different types, the steady-state and dynamic performances are quite different. Finally, simulations and experiments have been provided to verify the control and design of the proposed methods.

• Journal of Electrical Engineering and Technology
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• v.9 no.2
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• pp.569-575
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• 2014

A highly efficient class E power amplifier is demonstrated for application to wireless power transfer system. The amplifier is designed with an L-type matching at the output for harmonic rejection and output matching. The power loss and the effect of each component in the amplifier with the matching circuit are analyzed with the current ratio transmitted to the output load. Inductors with a quality factor of more than 120 are used in a dc feed and the matching circuit to improve transmission efficiency. The single-ended amplifier with 20 V supply voltage shows 7.7 W output power and 90.8% power added efficiency at 6.78 MHz. The wireless power transfer (WPT) system with the amplifier shows 5.4 W transmitted power and 82.3% overall efficiency. The analysis and measurements show that high-Q inductors are required for the amplifier design to realize highly efficient WPT system.

• Journal of Sensor Science and Technology
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• v.28 no.4
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• pp.240-245
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• 2019

Phase interpolation is widely adopted in frequency synthesizers and clock-and-data recovery systems to produce an intermediate phase from two existing phases. The intermediate phase is typically generated by combining two input phases with different weights. Unfortunately, this results in non-uniform phase steps. Alternatively, the intermediate phase can be generated by successive approximation, where the interpolated phase at each approximation stage is obtained using the same weight for the two intermediate phases. As a proof of concept, this study presents a 2-GHz 8-bit successive approximation digital-to-phase converter that is designed using 65-nm CMOS technology. The converter receives an 8-phase clock signal as input, and the most significant bit (MSB) section selects four phases to create two sinusoidal waveforms using a harmonic rejection filter. The remaining least significant bit (LSB) section applies the successive approximation to generate the required intermediate phase. Monte-Carlo simulations show that the proposed converter exhibits 0.46-LSB integral nonlinearity and 0.31-LSB differential nonlinearity with a power consumption of 3.12 mW from a 1.2-V supply voltage.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.8
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• pp.754-763
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• 2002

This paper discusses the improved power performances of the size-reduced amplifier using defected ground structure (DGS). The slow-wave effect and enlarged electrical length occur due to the additional equivalent circuit elements of DGS. Using these properties, it is possible to reduce the length of transmission lines in order to keep the same original electrical lengths by inserting DGS on the ground plane. The matching and performances of the amplifier are preserved even after DGS patterns have been inserted. While there is no loss in the size-reduced transmission lines at the operating frequency, but there exists loss to some extent at harmonic frequencies. This leads to the more excellent inherent capability of harmonic rejection of the size-reduced amplifier. Therefore, it is expected tile harmonics of the size-reduced amplifier are smaller than those of the original amplifier. The measured second harmonic, third order intermodulation distortion (IMD3), and adjacent channel power ratio (ACPR) of the size-reduced amplifier are smaller than those of the original amplifier by 5 dB, 2~6 dB, and 1~4 dB, respectively, as expectation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.10 s.101
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• pp.1050-1058
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• 2005

This paper presents how to design and implement a very compact, cost effective and broad band receiver module for IEEE 802.16 FWA(Fixed Wireless Access) in the 40 GHz band. The presented receiver module is fabricated in a multi-layer LTCC(Low Temperature Cofired Ceramic) technology with cavity process to achieve excellent electrical performances. The receiver consists of two MMICs, low noise amplifier and sub-harmonic mixer, an embedded image rejection filter and an IF amplifier. CB-CPW, stripline, several bond wires and various transitions to connect each element are optimally designed to keep transmission loss low and module compact in size. The LTCC is composed of 6 layers of Dupont DP-943 with relative permittivity of 7.1. The thickness of each layer is 100 um. The implemented module is $20{\times}7.5{\times}1.5\;mm^3$ in size and shows an overall noise figure of 4.8 dB, an overall down conversion gain of 19.83 dB, input P1 dB of -22.8 dBm and image rejection value of 36.6 dBc. Furthermore, experimental results demonstrate that the receiver module is suitable for detection of Digital TV signal transmitted after up-conversion of $560\~590\;MHz$ band to 40 GHz.