• Title/Summary/Keyword: Harmonic Load Pull Simulation

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Design of Reflector Type Frequency Doubler for Undesired Harmonic Suppression Using Harmonic Load Pull Simulation Technique

  • Jang, Jae-Woong;Kim, Yong-Hoon
    • Journal of electromagnetic engineering and science
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    • v.7 no.4
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    • pp.175-182
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    • 2007
  • In this paper, a study on the reflector type frequency doubler, to suppress the undesired harmonics, is presented. A 12 to 24 GHz reflective frequency doubler is simulated and experimented. Design procedure of the frequency doubler with reflector is provided and the frequency doubler with good spectral purity is fabricated successfully. It has harmonic suppression of the $40{\sim}50\;dBc$ in the $1^{st}$ harmonic and the $50{\sim}60\;dB$ in the $3^{rd}$ harmonic with no additional filter. And, it has conversion gain with the input power of 0 dBm over bandwidth of 500 MHz. A NEC's ne71300(N) GaAs FET is used and the nonlinear model(EEFET3) using IC-CAP program is extracted for harmonic load pull simulation. Good agreement between simulated and measured results has been achieved.

High Efficiency GaN HEMT Power Amplifier Using Harmonic Matching Technique (고조파 정합 기법을 이용한 고효율 GaN HEMT 전력 증폭기)

  • Jin, Tae-Hoon;Kwon, Tae-Yeop;Jeong, Jinho
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.1
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    • pp.53-61
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    • 2014
  • In this paper, we present the design, fabrication and measurement of high efficiency GaN HEMT power amplifier using harmonic matching technique. In order to achieve high efficiency, harmonic load-pull simulation is performed, that is, the optimum load impedances are determined at $2^{nd}$ and $3^{rd}$ harmonic frequencies as well as at the fundamental. Then, the output matching circuit is designed based on harmonic load-pull simulation. The measurement of the fabricated power amplifier shows the linear gain of 20 dB and $P_{1dB}$(1 dB gain compression point) of 33.7 dBm at 1.85 GHz. The maximum power added efficiency(PAE) of 80.9 % is achieved at the output power of 38.6 dBm, which belongs to best efficiency performance among the reported high efficiency power amplifiers. For W-CDMA input signal, the power amplifier shows a PAE of 27.8 % at the average output power of 28.4 dBm, where an ACLR (Adjacent Channel Leakage Ratio) is measured to be -38.8 dBc. Digital predistortion using polynomial fitting was implemented to linearize the power amplifiers, which allowed about 6.2 dB improvement of an ACLR performance.

Design of a GaN HEMT Power Amplifier Using Output Matching Circuit with Arbitrary Harmonic Impedances (임의의 고조파 임피던스를 갖는 출력 정합 회로를 이용한 GaN HEMT 전력증폭기의 설계)

  • Jeong, Hae-Chang;Son, Bom-Ik;Lee, Dong-Hyun;Ahmed, Abdul-Rahman;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1034-1046
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    • 2013
  • In this paper, a design of a GaN HEMT power amplifier using output matching circuit with arbitrary harmonic impedances is presented. The adopted GaN HEMT device, TGF2023-02 of TriQuint Semiconductor, was packaged in commercial package. The optimal impedances of the GaN HEMT package are extracted from load-pull simulation at package input and output reference planes. The targets of load-pull simulation are the highest output power at fundamental frequency and the highest efficiency at $2^{nd}$ and $3^{rd}$ harmonic frequencies. Because of fixture in the package, the extracted impedances shows arbitrary harmonic impedances. In order to match the optimal impedances, output matchin circuit which has 4 transmission lines is presented. Characteristic impedances and electrical lengths of the transmission lines are mathmatically calculated. The power amplfiier with $54.6{\times}40mm^2$ shows the output power of 8 W at the fundamental frequency of 2.5 GHz, the efficiency above 55 %, and harmonic suppression of above 35 dBc at the $2^{nd}$ and the $3^{rd}$ harmonics.

A Study on Design of Reflector Type Frequency Doubler in K-Band (리플렉터 형태의 K-대역 주파수 체배기 구현에 관한 연구)

  • Han, Sok-Kyun;Choi, Hyung-Ha
    • Journal of Navigation and Port Research
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    • v.28 no.1
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    • pp.37-41
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    • 2004
  • In this paper, a reflector type frequency doubler for local oscillator at 24GHz is designed and fabricated with ne71300-N MESFET. Optimum source and load impedances are decided through a multiharmonic load pull simulation technique. A conversion gain can be improved using the reflector and fundamental and third harmonics are well suppressed with open stub of $\lambda$/4 length Measured results show output power at 0dBm of input power is -3.776dBm, conversion gain 0.736dB, harmonic suppression 41.064dBc, respectively.

Design of 100mW Frequency Tripler Operating at 7 GHz (7 GHz 대역 100 mW 주파수 3체배기의 제작)

  • Roh, Hee-Jung;Joo, Jae-Hyun;Koo, Kyung-Heon
    • Journal of Advanced Navigation Technology
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    • v.14 no.1
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    • pp.20-26
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    • 2010
  • In this paper, a frequency tripler has been designed with 100mW medium-power using P-HEMT. It is designed to obtain 7.2 GHz frequency at the output that is an integer multiple of 2.4 GHz input frequency by using nonlinear device that produces 3rd harmonic. The frequency tripler is designed by using load-pull simulation. To suppress the 2nd and fundamental, notch filter is used for the frequency tripler. The tripler is designed to obtain about 21dBm output power with 15 dBm input, i.e., 6 dB conversion gain and the suppression of 20 dBc at fundamental, and 30 dBc at the second harmonics.

Design and Fabrication of the Frequency Tripper for Medium Power (중전력 주파수 3체배기 설계 및 제작)

  • Roh, Hee-Jung;Lee, Byung-Sun
    • 전자공학회논문지 IE
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    • v.47 no.3
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    • pp.47-52
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    • 2010
  • In this paper, a frequency tripler has been designed with 100mW medium-power using P-HEMT. It is designed to obtain 7.2GHz frequency at the output that is an integer multiple of 2.4GHz input frequency by using nonlinear device that produces 3rd harmonic. The frequency tripler is designed by using load-pull simulation. To suppress the 2nd and fundamental, notch filter is used for the frequency tripler. The tripler is designed to obtain about 21dBm output power with 15dBm input, i.e., 6dB conversion gain and the suppression of 20dBc at fundamental, and 30dBc at the second harmonics.

Design and Fabrication of the Frequency Doubler for 24GHz Local Oscillator (24GHz 대역 국부발진기용 주파수 체배기 설계 및 제작)

  • Seo, Gon;Kim, Jang-Gu;Han, Sok-Kyun;Park, Chang-Hyun;Choi, Byung-Hai
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.411-415
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    • 2003
  • In this paper, a reflector type frequency doubler for local oscillator at 24GHz is designed and fabricated with ne71300-N MESFET. Optimum source and load impedances are decided through a multiharmonic load pull simulation technique. A conversion gain ran be improved using the reflector and fundamental and third harmonics are well suppressed with open stub of λ/4 length. Measured results show output power at 0dBm of input power is -3.776dBm, conversion gain 0.736dB, harmonic suppression 41.064dBc, respectively.

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Design of ISM-band Folded Dipole Active Integrated Antenna (ISM 대역용 접힌 다이폴 능동 집적 안테나의 설계)

  • 이재홍;서종수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.11B
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    • pp.1612-1619
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    • 2001
  • This paper examines the design, implementation characteristics of a folded dipole active integrated antenna. Our goal was to minimize the physical size of RF circuit and its insertion loss, and to make the high frequency tuning easier by directly integrating the ISM(Industrial Scientific & Medical) band power amplifier and antenna. Non-linear model has been used for highly accurate simulation of the power amplifier. The maximum power level was found by using the Load pull method before an impedance matching was achieved. It is found that the total power-added efficiency(PAE) including the driving amplifier was 31.5% and that the transmit power was 13.7 dBm. We also found that the proposed scheme with the smaller antenna as compared with the existing dipole antenna has 23.7 dB total gain including the antenna gain. The suppression of the second harmonic signal to the fundamental signal with respect to the fundamental signal was found to be more than 30 dBc.

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