• Journal of Korean Society of Transportation
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• v.29 no.6
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• pp.107-116
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• 2011

In this paper, we implement an algorithm of transit signal priority control that not only maximizes service quality and efficiency of bus, but also minimizes the control delay of passenger cars using UTIS currently being deployed and operated in Seoul national capital area. For this purpose, we propose an algorithm that coordinates the strength of TSP by estimating bus demand. Typically, the higher the strength of TSP is on main street, the bigger the control delay is on the cross street. Motivated by this practical difficulty, we proposes an algorithm that coordinates TSP's strength by checking the degree of saturation of cross street. Also, we verify the possibility of field implementation via simulation analysis using CORSIM RTE based HILS (Hardware In the Loop Simulation). The result shows that travel time of bus improves about 10 percent without increasing control delay of passenger cars by TSP. We expect the result of this research to contribute to increasing the overall transit ridership in this country.

• Journal of the Korea Society for Simulation
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• v.28 no.2
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• pp.149-158
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• 2019

This paper introduces an integrated Modeling & Simulation framework for the efficient development of the rescue robot which rescues a wounded patients or soldiers and disposes a dangerous objects or explosive materials in the battlefields and disastrous environments. An integrated M&S(Modeling & Simulation) framework would have enabled us to perform the dynamic simulation program GAZEBO based Software-in-the-Loop Simulation(SILS) which is to replacing the robot platform hardware with a simulation software. An integrated M&S framework would help us to perform designing robot and performance validation of robot control results more efficiently. Furthermore, Tele-operation performance in the unstructured environments could be improved. We review a case study of applying an integrated M&S framework tool in validating performance of mobility stabilization control, one of the most important control strategy in the rescue robot.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.3
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• pp.81-86
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• 2010

Since CORDIC (COordinate Rotation DIgital Computer) is able to carry out the phase operation, such as vector to phase conversion or rotation of vectors, with adders and shifters, it is well suited for the design of the frequency synchronization unit in OFDM receivers. It is not easy, however, to fully utilize the CORDIC in the OFDM demodulator because of the non-linear characteristics of the direction sequence (DS), which is the representation of the phase in CORDIC. In this paper a new representation method is proposed to linearize the direction sequence approximately. The maximum phase error of the linearized binary direction sequence (LBDS) is also discussed. For the purpose of designing the hardware, the architectures for the binary DS (BDS) to LBDS converter and the LBDS to BDS inverse converter are illustrated. Adopting LBDS, the overall frequency synchronization hardware for OFDM receivers can be implemented fully utilizing CORDIC and general arithmetic operators, such as adders and multipliers, for the phase estimation, loop filtering of the frequency offset, derotation for the frequency offset correction. An example of the design of 22 bit LBDS for the T-DMB demodulator is also presented.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.4
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• pp.433-448
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• 2012

A source-synchronous receiver based on a delay-locked loop is presented. It employs a shared global calibration control between channels, yet achieves channel expandability for high aggregate I/O bandwidth. The global calibration control accomplishes skew calibration, equalizer adaptation, and phase lock of all the channels in a calibration period, resulting in the reduced hardware overhead and area of each data lane. In addition, the weight-adjusted dual-interpolating delay cell, which is used in the multiphase DLL, guarantees sufficient phase linearity without using dummy delay cells, while offering a high-frequency operation. The proposed receiver is designed in the 90-nm CMOS technology, and achieves error-free eye openings of more than 0.5 UI across 9-28 inch Nelco4000-6 microstrips at 4-7 Gb/s and more than 0.42 UI at data rates of up to 9 Gb/s. The data lane occupies only $0.152mm^2$ and consumes 69.8 mW, while the rest of the receiver occupies $0.297mm^2$ and consumes 56.0 mW at the 7- Gb/s data-rate and supply voltage of 1.35 V.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.1
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• pp.15-22
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• 2006

In OFDMA system, even if the number of allocated sub-channel in mobile station varies from one to the whole sub-channel as in base station, while because of mobile station's transmit power is lower than that of base station, therefore full loading range(FLR) constraint occurs where whole sub-channel can be used and the conventional open-loop power control scheme can not be used beyond FLR. We propose a new scheme that limits the maximum sub-channel allocation number and uses power concentration gain(PCG) depending on location of mobile station, which is based on ranging in OFDMA system. Simulation results show that the proposed scheme provides solutions for optimum utilization of radio resource depending on the location of mobile station and enables open-loop power control beyond FLR without extra hardware complexity.

• Transactions of the Korean Society of Automotive Engineers
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• v.21 no.2
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• pp.26-36
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• 2013

Purpose of this study is to develop virtual components and environment for developing a controller of an Active Air Suspension System in laboratory that slough off existing development environment using real vehicle test. This paper presents an air spring modeling and analysis of air suspension system for a commercial vehicle. Preferentially, It was performed vehicle test for pneumatic system and an air spring for characteristic analysis of system. Each component of an air spring suspension system was developed through emulations and modeling of system for pressure and height sensors in the basis on test results in SILS environment. Non-linear characteristics of air spring are accounted for using the measured data. Also, pressure and volume relations for vehicle hight control is considered. After performance verification of virtual model was performed, we developed virtual environment based on HILS for an Active Air Suspension System. We studied estimation and verification technology for control algorithm that developed.

• Journal of IKEEE
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• v.24 no.2
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• pp.385-391
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• 2020

Overcurrent and abnormal voltages in the distribution system can cause not only burden of power plant but also damage to customers. As a result, researches related to the distribution automation have been widely conducted by utilizing a real time digital simulation to improve the reliability of power supply through rapid failure handing, reduction of power failure intervals and failure recovery. However, the distribution automation systems using the real time digital simulator are expensive and limited to verify actual hardwares. Therefore, in this paper, an external hardware devices was developed based on the distribution system analysis results of the digital simulator. And real-time simulation and functional verification are implemented by the real feeder remote terminal units used in distribution automation. The effectiveness of the proposed system is verified through several experiments.

• The Transactions of the Korea Information Processing Society
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• v.7 no.12
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• pp.3848-3854
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• 2000

For the satisfying performance of a control system, design of a controller for the system which meets the required specifications and its supporting hardware that keep their functioning is important. Among the hardware of a control system, sensors are most vulnerable to malfunction. Thus it is necessary to keep track of accurate and reliable sensor readings for good controller performance. In case of sensor faults. they are detected by examining the sensor output values and the major values of the system, and then the types of the faults are recognized by the analysis of symptoms of faults. If necessary self-validating sensor values are synthesized according to the types of faults, and then they are used for the controller instead of the raw data.In this paper, a self 'validating sensor is applied to the control of a flexible link system with the sensor fault problems in the light sensor module for exact IXlsitioning to show the applicahility. It is shown that the digital controller can provide a satisfactory loop performance even when the sensor faults occur.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.6C
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• pp.637-644
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• 2006

This paper presents performance and implementation comparisons of standard and fast DCT algorithms that are commonly used for subband filter bank in MPEG audio coders. The comparison is made according to the architectural difference of the implementation hardware. Fast DCT algorithms are known to have much less computational complexity than the standard method that involves computing a vector dot product of cosine coefficient. But, due to structural irregularity, fast DCT algorithms require extra cycles to generate the addresses for operands and to realign interim data. When algorithms are implemented using DSP processors that provide special operations such as single-cycle MAC (multiply-accumulate), zero-overhead nested loop, the standard algorithm is more advantageous than the fast algorithms. Also, in case of the finite-precision processing, the error performance of the standard method is far superior to that of the fast algorithms. In this paper, truncation errors and algorithmic suitability are analyzed and implementation results are provided to support the analysis.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.1
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• pp.143-152
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• 2012

In this paper hardware implementation of GF($2^{191}$) elliptic curve cryptographic coprocessor which supports 7 operations such as scalar multiplication(kP), Menezes-Vanstone(MV) elliptic curve cipher/decipher algorithms, point addition(P+Q), point doubling(2P), finite-field multiplication/division is described. To meet structure resistant against simple power analysis, the ECC processor adopts the Montgomery scalar multiplication scheme which main loop operation consists of the key-independent operations. It has operational characteristics that arithmetic units, such GF_ALU, GF_MUL, and GF_DIV, which have 1, (m/8), and (m-1) fixed operation cycles in GF($2^m$), respectively, can be executed in parallel. The processor has about 68,000 gates and its simulated worst case delay time is about 7.8 ns under 0.35um CMOS technology. Because it has about 320 kbps cipher and 640 kbps rate and supports 7 finite-field operations, it can be efficiently applied to the various cryptographic and communication applications.