• Title/Summary/Keyword: Hardware Software INtegration

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Airborne GPS/INS Integration Processing Module Development

  • KANG, Joon-Mook;YUN, Hee-Cheon
    • Korean Journal of Geomatics
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    • v.3 no.2
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    • pp.99-106
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    • 2004
  • In order to meet the users' demand, who needs faster and more accurate data in geographic information, it is necessary to obtain and process the data more effectively. Now more effective data obtainments about geographic information is possible through the development of integration technology, which is applied to the field of geographic information, as well as through the development of hardware and software engineering. With the fast and precise correction and update, the development of integrate technology can bring the reduction of the time and money. To obtain fast and precise geographic information using Aerial Photogrammetry method, it is necessary to develop Airborne GPS/INS integration system, which makes GCP to the minimum. For this reason, this study has tried to develop a system which could unite and process both GPS and INS data. For this matter, code-processing module for DGPS and OTF initializaion module, which can decide integer ambiguity even in motion, have been developed. And also, continuous kinematic carrier-processing module has been developed to calculate the location at the moment of filming. In addition, this study suggests a possibility of using a module, which can unite GPS and INS, using Kalman filtering, and also shows the INS navigation theory.

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Planning Directions of Community Facilities Integrating Generations based on Local Communities

  • Jae Hee CHUNG;Ji Min KIM;Su Jin LEE;Sung Ze YI
    • The Journal of Economics, Marketing and Management
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    • v.12 no.1
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    • pp.39-51
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    • 2024
  • Purpose: This study aims to derive planning directions of community facilities integrating generations based on local communities to promote sustainable intergenerational exchange by analyzing the spatial configuration and programs of domestic and foreign generation-integrated community facilities based on local communities. Research design, data and methodology: Through theoretical consideration, the concept of intergenerational integration, types of intergenerational exchange, and spatial arrangement types were identified. Then, case study analysis of domestic and foreign community facilities with well-planned intergenerational exchange spaces and programs were conducted to identify intergenerational integration, and to derive community facility planning direction. Results: The results of this research are as follows. First, in terms of humanware, in order to revitalize continuous exchange between the 1st, 2nd, and 3rd generations, a systematic support system is needed to build mutual trust through voluntary participation by each generation. Second, it is important to provide a variety of shared spaces while maintaining the uniqueness of each facility from a hardware perspective, and must be planned in such a way that selective interaction takes place with privacy and interaction in mind. Third, in terms of software, programs that meet the characteristics of each user must be provided. Conclusions: It is expected that the results of this research can be used as basic data for planning community facilities that integrate generations based on local communities, contributing to the search for sustainable ways to revitalize intergenerational exchange in the future.

Framework for Improving Mobile Embedded Software Process (모바일 임베디드 소프트웨어 프로세스 개선 프레임워크)

  • Shin, Seung-Woo;Kim, Haeng-Kon;Kim, Soung-Won
    • Journal of Internet Computing and Services
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    • v.10 no.5
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    • pp.195-209
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    • 2009
  • The embedded software has been become more important than the hardware in mobile systems in ubiquitous society. The improvement models such as CMMI(Capability Maturity Model Integration) and SPICE(Software Process Improvement and Capability dEtermination) are used to improve the quality of software in general systems. Software process improvement is also necessary for mobile embedded software development to improve its quality. It is not easy to apply the general software improvement model to the mobile embedded software development due to the high cost effectiveness and heavy process. On the other hand, XP has the characteristics on focused communications with customers and iteration development. It is specially suitable for mobile embedded software development as depending on customer's frequent requirement changes and hardware attributes. In this paper, we propose a framework for development small process improvement based XP(eXtreme Programming)'s practice in order to accomplish CMMI level 2 or 3 in mobile embedded software development at the small organizations. We design and implement the Mobile Embedded Software Process Improvement System(MESPIS) to support process improvement. We also suggest the evaluation method for the mobile embedded software development process improvement framework with CMMI coverage check by comparing other process improvement model. In the future, we need to apply this proposed framework to real project for practical effectiveness and the real cases quantitative. It also include the enhance the functionality of MESPIS.

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System-level Hardware Function Verification System (시스템수준의 하드웨어 기능 검증 시스템)

  • You, Myoung-Keun;Oh, Young-Jin;Song, Gi-Yong
    • Journal of the Institute of Convergence Signal Processing
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    • v.11 no.2
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    • pp.177-182
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    • 2010
  • The flow of a universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In the developing process of a hardware component in system, the design phase has been regarded as a phase consuming lots of time and cost. However, the verification phase in which functionality of the designed component is verified has recently been considered as a much important phase. In this paper, the implementation of a verification environment which is based on SystemC infrastructure and verifies the functionality of a hardware component is described. The proposed verification system uses SystemC user-defined channel as communication interface between variables of SystemC module and registers of Verilog module. The functional verification of an UART is performed on the proposed verification system. SystemC provides class library for hardware modeling and has an advantage of being able to design a system consisting hardware and software in higher abstraction level than register transfer level. Source codes of SystemC modules are reusable with a minor adaptation on verifying functionality of another hardware component.

Design and Evaluation of Intelligent Helmet Display System (지능형 헬멧시현시스템 설계 및 시험평가)

  • Hwang, Sang-Hyun
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.45 no.5
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    • pp.417-428
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    • 2017
  • In this paper, we describe the architectural design, unit component hardware design and core software design(Helmet Pose Tracking Software and Terrain Elevation Data Correction Software) of IHDS(Intelligent Helmet Display System), and describe the results of unit test and integration test. According to the trend of the latest helmet display system, the specifications which includes 3D map display, FLIR(Forward Looking Infra-Red) display, hybrid helmet pose tracking, visor reflection type of binocular optical system, NVC(Night Vision Camera) display, lightweight composite helmet shell were applied to the design. Especially, we proposed unique design concepts such as the automatic correction of altitude error of 3D map data, high precision image registration, multi-color lighting optical system, transmissive image emitting surface using diffraction optical element, tracking camera minimizing latency time of helmet pose estimation and air pockets for helmet fixation on head. After completing the prototype of all system components, unit tests and system integration tests were performed to verify the functions and performance.

Architecture Design for Integration of Software RS and IM of Maritime DGPS Reference Station System (해양 DGPS 기준국 시스템의 소프트웨어 RS,IM 통합을 위한 아키텍처 설계)

  • Jang, Wonseok;Kim, Youngki;Seo, Kiyeol
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.2
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    • pp.282-288
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    • 2014
  • The DGPS reference station is a national infrastructure generating GPS correctional information and transmitting the signal for Differential GPS. Currently, Korea has applied and operated the software-based DGPS reference station as a standard of the next generation proposed by the USCG in order to improve the hardware-based DGPS reference system. However, software-based DGPS reference station proposed by USCG was changed in software method, only for form. There is no advantage to changing software-based because the most critical part of architecture has not been improved. In this paper, we have designed a new software-based marine DGPS station architecture that a reference station software and a monitor station were integrated. The new marine DGPS station architecture based on software is a more simplified structure than it used to be and can be utilized in the DGPS reference station.

Design and Implementation of Dual-Mode Cordless Phone and walkie-Talky System: A Software Radio Approach (소프트웨어 라디오 방식의 무선전화기 및 워키토키 이중 모드 시스템의 구현)

  • Sung, Min-Young
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.9 no.3
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    • pp.674-680
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    • 2008
  • An SDR (Software Defined Radio) system based on general purpose computing platform has benefits of ease of software development process, high degree of software compatibility, and cost-effectiveness of general purpose processors. This paper discusses design and implementation of a dual-mode SDR system that supports both cordless phone and walkie-talky system running on Linux-based general purpose computing platform. For this purpose, we designed modulation and demodulation software on open source-based GNU radio middleware. We also designed a customized RF front-end hardware which performs frequency conversion between RF and IF. The proposed SDR system successfully exhibited its ability to operate both cordless phone and walkie-talky communication on Intel processor-based general purpose computing platform. But experience with the prototype SDR system shows that further research is required for run-time software reconfiguration and efficient integration with conventional TCP/IP protocol stacks.

A study of extended processor trace decoder structure for malicious code detection (악성코드 검출을 위한 확장된 프로세서 트레이스 디코더 구조 연구)

  • Kang, Seungae;Kim, Youngsoo;Kim, Jonghyun;Kim, Hyuncheol
    • Convergence Security Journal
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    • v.18 no.5_1
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    • pp.19-24
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    • 2018
  • For a long time now, general-purpose processors have provided dedicated hardware / software tracing modules to provide developers with tools to fix bugs. A hardware tracer generates its enormous data into a log that is used for both performance analysis and debugging. Processor Trace (PT) is a new hardware-based tracing feature for Intel CPUs that traces branches executing on the CPU, which allows the reconstruction of the control flow of all executed code with minimal labor. Hardware tracer has been integrated into the operating system, which allows tight integration with its profiling and debugging mechanisms. However, in the Windows environment, existing studies related to PT focused on decoding only one flow in sequence. In this paper, we propose an extended PT decoder structure that provides basic data for real-time trace and malicious code detection using the functions provided by PT in Windows environment.

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Hardware Design of Super Resolution on Human Faces for Improving Face Recognition Performance of Intelligent Video Surveillance Systems (지능형 영상 보안 시스템의 얼굴 인식 성능 향상을 위한 얼굴 영역 초해상도 하드웨어 설계)

  • Kim, Cho-Rong;Jeong, Yong-Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.9
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    • pp.22-30
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    • 2011
  • Recently, the rising demand for intelligent video surveillance system leads to high-performance face recognition systems. The solution for low-resolution images acquired by a long-distance camera is required to overcome the distance limits of the existing face recognition systems. For that reason, this paper proposes a hardware design of an image resolution enhancement algorithm for real-time intelligent video surveillance systems. The algorithm is synthesizing a high-resolution face image from an input low-resolution image, with the help of a large collection of other high-resolution face images, called training set. When we checked the performance of the algorithm at 32bit RISC micro-processor, the entire operation took about 25 sec, which is inappropriate for real-time target applications. Based on the result, we implemented the hardware module and verified it using Xilinx Virtex-4 and ARM9-based embedded processor(S3C2440A). The designed hardware can complete the whole operation within 33 msec, so it can deal with 30 frames per second. We expect that the proposed hardware could be one of the solutions not only for real-time processing at the embedded environment, but also for an easy integration with existing face recognition system.

Design and Hardware Integration of Humanoid Robot Platform KHR-2 (인간형 로봇 플랫폼 KHR-2 의 설계 및 하드웨어 집성)

  • Kim, Jung-Yup;Park, Ill-Woo;Oh, Jun-Ho
    • Proceedings of the KSME Conference
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    • 2004.11a
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    • pp.579-584
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    • 2004
  • In this paper, we present the mechanical, electrical system design and system integration of controllers including sensory devices of the humanoid, KHR-2 (KAIST Humanoid Robot - 2). We have developed KHR-2 since 2003. Total number of DOF of KHR-2 is 41. Each arm including a hand has 11 DOF and each leg has 6 DOF. Head and trunk also has 6 DOF and 1 DOF respectively. In head, two CCD cameras are used for eye. To control all axes efficiently, distributed control architecture is used to reduce computation burden of main controller and to expand devices easily. So we developed the sub-controller as a servo motor controller and a sensor interfacing devices using microprocessor. The main controller attached its back communicates with sub-controllers in real-time by CAN (Controller Area Network) protocol. We used Windows XP as its OS (Operation System) for fast development of main control program and easy extension of peripheral devices. And RTX HAL extension commercial software is used to realize the real-time control in Windows XP environment.

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