• Title/Summary/Keyword: HI layer

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Hierarchical Location Mobility Management using MobilityManagement Points in IP networks

  • Park, Chul Ho;Oh, Sang Yeob
    • Journal of Korea Multimedia Society
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    • v.25 no.8
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    • pp.1069-1074
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    • 2022
  • IP mobility can be handled in different layers of the protocol. Mobile IP has been proposed to handle the mobility of Internet hosts in the network layer. Recently, a new method based on the SIGMA mobility architecture has been proposed to support mobility management with reduced packet loss and latency. The location management structure is not suitable for frequent mobile handover due to the high mobility of the user with this transport layer solution. In this paper, we propose a location management optimization method in a mobile communication network by applying hierarchical location management using MMPs(Mobility Management Points) for transport layer mobility management. Therefore, we propose an efficient hierarchical mobility management structure even between heterogeneous wireless networks using MMPs for the probability that a mobile terminal can change multiple location areas between two messages and calls. The proposed method shows reduction in location update cost and data retrieval cost using MMPs, and as opposed to mobility appearing in time intervals with the minimum cost required to reach 90% of the stabilized cost, the mobility location update search, location It was found that the message processing cost per area was reduced.

Improvement of Thermal Stability of Nickel Silicide Using Co-sputtering of Ni and Ti for Nano-Scale CMOS Technology

  • Li, Meng;Oh, Sung-Kwen;Shin, Hong-Sik;Lee, Hi-Deok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.3
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    • pp.252-258
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    • 2013
  • In this paper, a thermally stable nickel silicide technology using the co-sputtering of nickel and titanium atoms capped with TiN layer is proposed for nano-scale metal oxide semiconductor field effect transistor (MOSFET) applications. The effects of the incorporation of titanium ingredient in the co-sputtered Ni layer are characterized as a function of Ti sputtering power. The difference between the one-step rapid thermal process (RTP) and two-step RTP for the silicidation process has also been studied. It is shown that a certain proportion of titanium incorporation with two-step RTP has the best thermal stability for this structure.

Effects of Ti on High Temperature Oxidation of Ni-Based Superalloys (Ni 기지 초내열합금의 고온산화 저항성에 미치는 Ti의 영향)

  • Park, Si-Jun;Seo, Seong-Moon;Yoo, Young-Soo;Jeong, Hi-Won;Jang, HeeJin
    • Corrosion Science and Technology
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    • v.15 no.3
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    • pp.129-134
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    • 2016
  • The effects of Ti on the high temperature oxidation of Ni-based superalloys were investigated by cyclic oxidation at $850^{\circ}C$ and $1000^{\circ}C$. The oxide scale formed at $850^{\circ}C$ consists of $Cr_2O_3$, $Al_2O_3$, and $NiCr_2O_4$ layers, while a continuous $Al_2O_3$ layer was formed at $1000^{\circ}C$. The oxidation rate of the alloy with higher Ti content was higher than the alloy with less Ti content at $850^{\circ}C$, possibly due to the increase in the metal vacancy concentration in the $Cr_2O_3$ layer involved by incorporation of $Ti^{4+}$. However, Ti improved the oxidation resistance of the superalloy at $1000^{\circ}C$ by reducing oxygen vacancy concentration in $Al_2O_3$ layer.

Stress Dependence of Thermal Stability of Nickel Silicide for Nano MOSFETs

  • Zhang, Ying-Ying;Lim, Sung-Kyu;Lee, Won-Jae;Zhong, Zhun;Li, Shi-Guang;Jung, Soon-Yen;Lee, Ga-Won;Wang, Jin-Suk;Lee, Hi-Deok
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.15-16
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    • 2006
  • The thermal stability of nickel silicide with compressively and tensilely stressed nitride capping layer has been investigated in this study. The Ni (10 nm) and Ni/Co/TiN (7/3/25 nm) structures were deposited on the p-type Si substrate. The stressed capping layer was deposited using plasma enhanced chemical vapor deposition (PECVD) after silicide formation by one-step rapid thermal process (RTP) at $500^{\circ}C$ for 30 sec. It was found that the thermal stability of nickel silicide depends on the stress induced by the nitride capping layer. In the case of Ni (10 nm) structure, the high compressive sample shows the best thermal stability, whereas in the case of Ni/Co/TiN (7/3/25 nm) structure, the high compressive sample shows the worst thermal stability.

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Experimental Analysis on the Anodic Bonding with Evaporated Glass Layer

  • Choi, Woo-Beom;Ju, Byeong-Kwon;Lee, Yun-Hi;Jeong, Seong-Jae;Lee, Nam-Yang;Koh, Ken-Ha;Haskard, M.R.;Sung, Man-Young;Oh, Myung-Hwan
    • Proceedings of the KIEE Conference
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    • 1996.07c
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    • pp.1946-1949
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    • 1996
  • We have performed silicon-to-silicon anodic bonding using glass layer deposited by electron beam evaporation. Wafers can be bonded at $135^{\circ}C$ with an applied voltage of $35V_{DC}$, which enables application of this technique to the vacuum packaging of microelectronic devices, because its bonding temperature and voltage are low. From the experimental results, we have found that the evaporated glass layer more than $1\;{\mu}$ m thick was suitable for anodic bonding. The role of sodium ions for anodic bonding was also investigated by theoretical bonding mechanism and experimental inspection.

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Charge Spreading Effect of Stored Charge on Retention Characteristics in SONOS NAND Flash Memory Devices

  • Kim, Seong-Hyeon;Yang, Seung-Dong;Kim, Jin-Seop;Jeong, Jun-Kyo;Lee, Hi-Deok;Lee, Ga-Won
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.4
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    • pp.183-186
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    • 2015
  • This research investigates the impact of charge spreading on the data retention of three-dimensional (3D) silicon-oxide-nitride-oxide-silicon (SONOS) flash memory where the charge trapping layer is shared along the cell string. In order to do so, this study conducts an electrical analysis of the planar SONOS test pattern where the silicon nitride charge storage layer is not isolated but extends beyond the gate electrode. Experimental results from the test pattern show larger retention loss in the devices with extended storage layers compared to isolated devices. This retention degradation is thought to be the result of an additional charge spreading through the extended silicon nitride layer along the width of the memory cell, which should be improved for the successful 3-D application of SONOS flash devices.

Optical properties of Ag/$Ge_1Se_1Te_2$ material with secondary Ag layer adoption (두 번째 Ag 층을 적용한 Ag/$Ge_1Se_1Te_2$ 물질의 광학적 특성 연구)

  • Kim, Hyun-Koo;Han, Song-Lee;Kim, Jae-Hoon;Koo, Sang-Mo;Chung, Hong-Bay
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.191-192
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    • 2008
  • For phase transition method, good record sensitivity, low heat radiation, fast crystallization and hi-resolution are essential. Also, a retention time is very important part for phase-transition. In our past papers, we chose composition of $Ge_1Se_1Te_2$ material to use a Se factor which has good optical sensitivity than conventional Sb. Ge-Se-Te and Ag/$Ge_1Se_1Te_2$ samples are fabricated and irradiated with He-Ne laser and DPSS laser to investigate a reversible phase change by light. Because of Ag ions, the Ag layer inserted sample showed better performance than conventional one. We should note that this novel one showed another possibility for phase-change random access memory.

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Electron Emission From Porous Poly-Silicon Nano-Device for Flat Panel Display (다결정 다공성 실리콘의 전계방출 특성)

  • Lee, Joo-Won;Kim, Hoon;Lee, Yun-Hi;Jang, Jin;Ju, Byeong-Kwon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.4
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    • pp.330-335
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    • 2003
  • This paper reports the optimum structure of the vacuum packaged Porous poly-silicon Nano-Structured (PNS) emitter. The PNS layer was obtained by electrochemical etching process into polycrystalline silicon layer in a process controlled to anodizing condition. Current-voltage studies were carried out to optimize process condition of electron emission properties as a function of anodizing condition and top electrode thickness. Also, we measured in advance the electron emission properties as a function of substrate temperature because the vacuum packaged process was performed under the condition of high temperature ambient (430$^{\circ}C$). Auger Electron Spectrometer (AES) studies shows that Au as a top-electrode was diffused to PNS layer during temperature experiments. Thus, we optimized the thickness of top-electrode in order to make the vacuum package PNS emitter. As a result, the vacuum Packaged PNS emitter was successfully emitted by optimizing process.

Effect of silica top layer and Co interlayer on the thermal stability of nickel silicide (니켈 실리사이드의 열안정성에 대한 실리카 상부막과 코발트 중간막의 영향)

  • Han Kil Jin;Cho Yu Jung;Kim Yeong Cheol;Oh Soon Young;Kim Yong Jin;Lee Won Jae;Lee Hi Deok
    • Journal of the Semiconductor & Display Technology
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    • v.4 no.2 s.11
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    • pp.7-10
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    • 2005
  • [ $SiO_{2}$ ] or SiON is usually deposited and annealed after formation of silicide in real transistor fabrication processes. Nickel silicide and nickel silicide with Co interlayer were annealed at 650$^{\circ}C$ for 30 min with silica top layer in this study to investigate its thermal stability. SEM, XPS, and FPP(four point probe) were employed for the investigation. Nickel silicide with Co interlayer showed improved thermal stability. Co interlayer seems to play a key role to the stability of nickel silicide.

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Stress Dependence of Thermal Stability of Nickel Silicide for Nano MOSFETs

  • Zhang, Ying-Ying;Lee, Won-Jae;Zhong, Zhun;Li, Shi-Guang;Jung, Soon-Yen;Lee, Ga-Won;Wang, Jin-Suk;Lee, Hi-Deok;Lim, Sung-Kyu
    • Transactions on Electrical and Electronic Materials
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    • v.8 no.3
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    • pp.110-114
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    • 2007
  • Dependence of the thermal stability of nickel silicide on the film stress of inter layer dielectric (ILD) layer has been investigated in this study and silicon nitride $(Si_3N_4)$ layer is used as an ILD layer. Nickel silicide was formed with a one-step rapid thermal process at $500^{\circ}C$ for 30 sec. $2000{\AA}$ thick $Si_3N_4$ layer was deposited using plasma enhanced chemical vapor deposition after the formation of Ni silicide and its stress was split from compressive stress to tensile stress by controlling the power of power sources. Stress level of each stress type was also split for thorough analysis. It is found that the thermal stability of nickel silicide strongly depends on the stress type as well as the stress level induced by the $Si_3N_4$ layer. In the case of high compressive stress, silicide agglomeration and its phase transformation from the low-resistivity nickel mono-silicide to the high-resistivity nickel di-silicide are retarded, and hence the thermal stability is obviously improved a lot. However, in the case of high tensile stress, the thermal stability shows the worst case among the stressed cases.