• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.11
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• pp.2404-2410
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• 2011

This paper describes the design overview of cluster file system $SANique^{TM}$ based on SAN(Storage Area Network) environment. The design issues and problems of the conventional global buffer manager are also illustrated under a large set of clustered computing hosts. We propose the efficient global buffer management method that provides the more scalability and availability. In our proposed global buffer management method, we reuse the maintained list of lock information from our cluster lock manager. The global buffer manger can easily find and determine the location of requested data block cache based on that lock information. We present the pseudo code of the global buffer manager and illustration of global cache operation in cluster environment.

• Journal of KIISE:Computing Practices and Letters
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• v.10 no.2
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• pp.134-145
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• 2004

With rapid growth in the amount of data transferred on the Internet, traditional storage systems have reached the limits of their capacity and performance. SAN (Storage Area Network), which connects hosts to disk with the Fibre Channel switches, provides one of the powerful solutions to scale the data storage and servers. In this environment, the maintenance of data consistency among hosts is an important issue because multiple hosts share the files on disks attached to the SAN. To preserve data consistency, each host can execute the disk I/O whenever disk read and write operations are requested. However, frequent disk I/O requests cause the deterioration of the overall performance of a SAN cluster. In this paper, we introduce a SANtopia global buffer manager to improve the performance of a SAN cluster reducing the number of disk I/Os. We describe the design and algorithms of the SANtopia global buffer manager, which provides a buffer cache sharing mechanism among the hosts in the SAN cluster. Micro-benchmark results to measure the performance of block I/O operations show that the global buffer manager achieves speed-up by the factor of 1.8-12.8 compared with the existing method using disk I/O operations. Also, File system micro-benchmark results show that SANtopia file system with the global buffer manager improves performance by the factor of 1.06 in case of directories and 1.14 in case of files compared with the file system without a global buffer manager.

• Progress in Superconductivity and Cryogenics
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• v.6 no.4
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• pp.41-45
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• 2004

Rapid Single flux quantum (RSFQ) confluence buffer is widely used in complex superconductive digital circuits. In this work, we have improved the currently used confluence buffer and obtained a more soundly designed confluence buffer. In simulations, improvements in the bias margins of 11 % and the global margins of 10%, compared to the previously used confluence buffer, were achieved. Global margins are very important in estimating a process error range allowed in fabrications. We used two circuit simulation tools, WRspice and Julia, to design and optimize the confluence buffer. We used Xic to obtain a mask layout. We fabricated the improved circuits by using Nb technology. The test results at low frequency showed that the improved confluence buffer operated correctly and had a very wide main bias margin of +/-43% enhanced from +/-26% of the previously used confluence buffer.

• Journal of IKEEE
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• v.25 no.1
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• pp.180-192
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• 2021

One widely used algorithm for image recognition and pattern detection is the convolution neural network (CNN). To efficiently handle convolution operations, which account for the majority of computations in the CNN, we use hardware accelerators to improve the performance of CNN applications. In using these hardware accelerators, the CNN fetches data from the off-chip DRAM, as the massive computational volume of data makes it difficult to derive performance improvements only from memory inside the hardware accelerator. In other words, data communication between off-chip DRAM and memory inside the accelerator has a significant impact on the performance of CNN applications. In this paper, a simulator for the CNN is developed to analyze the main memory or DRAM access with respect to the size of the on-chip memory or global buffer inside the CNN accelerator. For AlexNet, one of the CNN architectures, when simulated with increasing the size of the global buffer, we found that the global buffer of size larger than 100kB has 0.8x as low a DRAM access count as the global buffer of size smaller than 100kB.

• Journal of Korea Trade
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• v.23 no.3
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• pp.118-137
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• 2019

Purpose - As global trade disputes intensify and global trade uncertainty increases due to the prevailing trade protectionism all over the world, mega-FTAs such as the RCEP and CPTPP are suggested as strategic trade policy options for export-driven small open economies, such as Korea. This paper aims to provide a comprehensive analysis of Korea's mega-FTA participation and the induced implications for the Korean economy. Design/methodology - We use a multi-region, multi-sector global CGE model, and investigate the different effects of both the US-China and US-EU trade wars on the relative changes in GDP, welfare, and trade under different trade policy regimes; (i) Korea does not participate in any mega-FTA, (ii) Korea participates in the RCEP, and (iii) Korea participates in the CPTPP. Findings - We show, among others, that though industrial effects might be largely varied, the overall enlarging of free trade zones through multilateral mega-FTA participation may contribute significantly to the macroeconomic soundness and stability of Korea, even when global trade protectionism prevails. Under RCEP and CPTPP trade regimes, Korea's GDP may increase even when the global trade environment deteriorates as trade wars occur and intensify between the US and China, or between the US and EU. It is also estimated that RCEP participation increases Korea's GDP, welfare (measured in equivalent variation), and total trade by 1.12%, $1.09 billion, and 2.54%, respectively, while CPTPP participation increases them by 0.19%, $0.92 billion, and 0.13%, respectively. Originality/value - Existing studies usually focus on the direct impacts of mega-FTA participation on macroeconomic variables such as GDP, welfare, and trade, and do not consider the possible buffer effects of a mega-FTA when the global trade environment worsens. In this paper, we analyze and quantify not only the direct impacts of RCEP and CPTPP on the main macroeconomic variables but also the possible buffer effects of the RCEP and CPTPP in the cases of the US-China and US-EU trade wars.

• Journal of Communications and Networks
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• v.3 no.4
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• pp.334-341
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• 2001

The provision of QoS control is a key of the successful deployment of multimedia networks. Buffer management plays an important role in QoS control. Therefore, this paper proposes a novel QoS buffer management algorithm named GREEN (Global Random Early Estimation for Nipping), which extends the concepts of ERD (early random drop) and RED (random early detection). Specifically, GREEN enhances the concept of "Random" to "Global Random" by globally considering the random probability function. It also enhances the concept of "Early" to "Early Esti mation" by early estimating the network status. For performance evaluation, except compared with RED, extensive simulation cases are performed to probe the characteristics of GREEN.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.2
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• pp.72-75
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• 2006

A CMOS compatible Super Junction LDMOS (SJ-LDMOS) structure, which reduces substrate-assisted depletion effects, is reported. The proposed structure uses a N-buffer layer between the pillars and P-substrate to achieve global charge balance between the pillars, the N-buffer layer and the P-substrate. The new structure features high breakdown voltage, low on-resistance, and reduced sensitivity to doping imbalance in the pillars.

• Journal of KIISE:Computing Practices and Letters
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• v.9 no.4
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• pp.410-419
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• 2003

The buffer cache of general operating systems such as Linux manages file data by using global block replacement policy and read ahead. As a result, multimedia data with a low locality of reference and various consumption rate have low cache hit ratio and consume additional buffers because of read ahead. In this paper we have designed and implemented a new buffer allocation algorithm for multimedia data on Linux. Our approach keeps one read-ahead cache per every opened multimedia file and dynamically changes the read-ahead group size based on the buffer consumption rate of the file. This distributes resources fairly and optimizes the buffer consumption. This paper compares the system performance with that of Linux 2.4.17 in terms of buffer consumption and buffer hit ratio.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.7B
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• pp.745-759
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• 2011

In this paper, we propose the global handover mechanism that is able to provide the unlimited range of next-generation multimedia mobile services in an integrated environment. This mechanism consists of a multicast source based forwarding scheme and a global session management scheme. Global session management scheme provides LMA session information management, global mobility and route optimization. Multicast source based forwarding scheme delivers data between previously attached LMA and newly attached LMA without packet loss. In addition, this scheme removes the redundancy of buffered data. We present a performance evaluation and features analysis by the simulations using the ns-2. Global session management scheme has a less handover latency, propagation delay and signaling cost than the conventional methods. Multicast source based forwarding scheme can deliver buffer data without loss and it has less buffer size than conventional method.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.113-116
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• 2003

Confluence buffers and single flux quantum (SFQ) switches are essential components in constructing a high speed superconductive Arithmetic Logic Unit (ALU). In this work, we developed a SFQ confluence buffer and an SFQ switch. It is very important to optimize the circuit parameters of a confluence buffer and an SFQ switch to implement them into an ALU. The confluence buffer that we are currently using has a small bias margin of $\pm$11％. By optimizing it with a Josephson circuit simulator, we improved the design of confluence buffer. Our simulation study showed that we improved bias global margin of 10％ more than the existent confluence buffer. In simulations, the minimal bias margin was $\pm$33％. We also designed, fabricated, and tested an SFQ switch operating in a DC mode. The mask layout used to fabricate the SFQ switch was obtained after circuit optimization. The test results of our SFQ switch showed that it operated correctly and had a reasonably wide margin of $\pm$15％.