• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.91-95
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• 2003

In this work, we have designed Gilbert cell downconversion mixer using 0.25um Anam CMOS process, we also have analyzed Conversion gain and IIP3 using Taylor series in our own unique way. Especially, bulk terminal is used as LO( Local Oscillator) input for reduction of power consumption and supply voltage. Supply voltage used in this design is lower than 1.8V and core current is less than 500uA. The simulation experiments showed that the conversion gain, IIP3, and power consumption were -1dB, 4.46dBm, and 0.8mW, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.8
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• pp.764-768
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• 2002

In this paper, a double balanced gilbert cell MMIC mixer was realized in Tachyonics SiGe HBT technology. The fabricated mixer has 17 dB conversion gain, 9.8 dB noise figure, -4.2 dBm output 1 dB compression point, -27 dBc RF to IF isolation, and the good input, output matching characteristics. It draws 10 mA from a 3 V supply. The simulation and the measured results are closer to each other, which confirms accuracy of the model library and reliability of the process.

• The Journal of the Acoustical Society of Korea
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• v.18 no.3E
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• pp.44-48
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• 1999

The CMOS four-quadrant analog multiplier for low-voltage low-power applications are presented in this thesis. The circuit approach is based on the characteristic of the LV (Low-Voltage) composite transistor which is one of the useful analog building block. SPICE simulations are carried out to examine the performances of the designed multiplier. Simulation results are obtained by 0.6㎛ CMOS parameters with 2V power supply. The basic configuration of the multiplier is the CMOS Gilbert cell with two LV composite transistors. The linear input range of the multiplier is over ±0.4V with a linearity error of less than 1.3%. The measured -3dB bandwidth is 288MHz and the power dissipation is 255 ㎼.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.77-81
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• 2002

This paper demonstrates a CMOS downconversion mixer for 2.4GHz ISM band applications. The mixer, implemented in a 0.18um CMOS process, is based on the CMOS Gilbert Cell mixer, With a 2.5GHz local oscillator and a 2.45GHz RF input, the measurement results exhibit power conversion gam of -6dB, IIP3 of -6dBm, input $P_{-1dB}$ of -15 dBm, and power dissipation in mixer core of 2.7 mW with 0㏈m LO power and 1.8V supply voltage.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.391-395
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• 2003

In this work, we have designed Gilbert cell downconversion mixer using 0.25um Anam CMOS process, we also have analyzed Conversion gain and IIP3 using Taylor series in our own unique way. Especially, bulk terminal is used as LO( Local Oscillator) input for reduction of power consumption and supply voltage. Supply voltage used in this design is lower than 1.8V and core current is less than 500uA. The simulation experiments showed that the conversion gain, IIP3, and power consumption were -1 dB, 4.46dBm, and 0.8mW, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1269-1276
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• 2005

In this paper, Mixer using the direct-conversion method intended to use in front-end of a RF receiver is designed. The direct conversion Mixer is an alternative wireless receiver architecture to the well-established superheterodyne, particularly for high integration, low power, and low cost. It operates at 2.4GHz band, and is designed and simulated with a 0.35um CMOS technology and HSPICE simulator. Layout is implemented with a Mentor IC Station. The 2.4GHz CMOS Mixer employs a modified single-balanced Gilbert Cell with additional MOSFET in the output stages to improve IIP2, which is a standard of linearity in direct conversion receiver. Additional coversion-stages's transconductances are controlled by each MOSFET's physical properties. The HSPICE simulation results show that the 2.4GHz CMOS Mixer has voltage gam of 29dB, IIP2 of 63dBm, respectively. The Mixer also draws 3.5mA from a 3.3V supply.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.10
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• pp.1849-1860
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• 1994

Domain wall dynamics in thin film of amorphous Rare Earth-Transistion Metal alloys were investigated using numerical integration of the Landau-Lifshitz-Gilbert equation. The thin film was divided into a two-dimensional square lattice ($30\times30$) of dipoles. Nearest-neighbor exchange interaction magnetic anisotropy, applied magnetic field, and demagnetiing field of interacting anisotropy, applied magnetic field, and demagnetizing field of interacting dipoles were considered. It was assumed that the film had perfect uniaxial anisotropy in the perpendicular direction and the magnetization reversal existed in the film. The time of domain wall creation and the thickness of the wall were investigated. Also the motion of domain walls under an applied field was considered. Simulation results showed that the time of domain wall creation was decreased significantly and the average velocity of domain wall was increased somewhat when the demagnetizing field was considered.

• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.414-417
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• 2008

This paper presents the design and analysis of 2.45GHz Low-IF Mixer using CMOS 0.18um. The Mixer is implemented by using the Gilbert-type configuration, current bleeding technique, and the resonating technique for the tail capacitance. And the design of this Double Balance Mixer is based on its lineaity since it is important in the interference cancellation system. The low flicker noise mixer is implemented by incorporating a double balanced Gilber-type configuration, the RF leakage-less current bleeding technique, and Cp resonating technique. The proposed mixer has a simulated conversion gain of 16dB a simulated IIP3 of -3.3dBm and P1dB is -19dBm. A simulated noise figure of 6.9dB at l0MHz and a flicker corner frequency of 510kHz while consuming only 10.65mW od DC power. The layout of Mixer for one-chip design in a 0.18-um TSMC process has 0.474mm$\times$0.39 mm size.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.531-532
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• 2008

In this paper, we present the comparison of the CMOS Double-Balanced Mixer for WLAN applications using the tail current source and not using it at the same current. The mixers are derived from the Gilbert cell mixer and have been simulated by using TSMC $0.18{\mu}m$ RF CMOS technology.

• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.61-64
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• 2000

This paper describes a RF Down-Conversion Mixer for mobile communication systems. This circuit achieves low voltage operation and low power consumption by reducing stacked devices of conventional gilbert cell mixer. In order to reduce stacked devices, we use source-follower structure. The proposed RF Down-Conversion mixer operates up to 1.85GHz at 1.5V power supply with 0.25um CMOS technology and consumes 2.2mA.