• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.6
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• pp.609-613
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• 2023

In this paper, a 1,200 V Si-based IGBT used in electric vehicles and new energy industries was designed. A field stop IGBT with a separate gate structure, which is the proposed structure, was designed to change trench depth and split gate width variables. Then, the general trench structure and electrical characteristics were compared and analyzed. As a result of conducting the trench depth experiment, it was confirmed that the breakdown voltage was the highest at 6 ㎛, and the on-state voltage drop was the lowest at 3.5 ㎛. In the separate gate width experiment, it was confirmed that the breakdown voltage decreased as the variable increased, and the on-state voltage drop increased. Therefore, it may be seen that it is preferable not to change the width of the separate gate. In addition, experiments show that there is no difference in on-state voltage drop compared to a structure in which a general field stop structure has a separate gate structure. In other words, it is determined that adding a dummy gate with a separate gate structure to the active cell will significantly improve the on-voltage drop characteristics, while confirming that the on-voltage drop does not change, and while having excellent characteristics in terms of breakdown voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.21-25
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• 2008

In this study, to maximize RF performance of MOSFETs, $f_T$ and $f_{max}$ dependent data on $W_u$ are measured and newly analyzed by extracting small-signal model parameters. From the physical analysis results, it is found that a peak value of $f_T$ is generated by $W_u$-independent parasitic gate-bulk capacitance at narrow $W_u$ and the wide width effect of reducing the increasing rate of transconductance at wide $W_u$. In addition, it is revealed that a maximum value of $f_{max}$ is caused by the non-quasi-static effect that the gate resistance is greatly reduced at narrow $W_u$ and becomes constant at wide $W_u$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.156-163
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• 2008

We proposed a new $p^+/n^+$ gate locally-separated-channel (LSC) bulk FinFET which has vertically formed oxide region in the center of fin body, and device characteristics were optimized and compared with that of normal channel (NC) FinFET. Key device characteristics were investigated by changing length of $n^+$ poly-Si gate ($L_s$), the material filling the trench, and the width and length of the trench at a given gate length ($L_g$). Using 3-dimensional simulations, we confirmed that short-channel effects were properly suppressed although the fin width was the same as that of NC device. The LSC device having the trench non-overlapped with the source/drain diffusion region showed excellent $I_{off}$ suitable for sub-50 nm DRAM cell transistors. Design of the LSC devices were performed to get reasonable $L_s/L_g$ and channel fin width ($W_{cfin}$) at given $L_gs$ of 30 nm, 40 nm, and 50 nm.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.747-750
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• 2003

We have studied PHEMTs optimization by means of fabrication of PHEMTs. All PHEMTs have been fixed with a gate length of 0.1 ${\mu}{\textrm}{m}$, a gate head size of 0.75${\mu}{\textrm}{m}$, and two gate fingers. We have measured the characteristics of PHEMTs with variation of source-drain spacing, pad size, and gate width. As a result, we have found the enhanced characteristics of $I_{dss}$, $S_{21}$, $h_{21}$, $f_{T}$, $f_{max}$, and $G_{ms}$ with increasing gate width. Also, $g_{m}$ has improved with decreasing source-drain spacing, and $S_{21}$ has improved with deceasing pad size.e.e.e.e.

• Journal of IKEEE
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• v.25 no.2
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• pp.381-387
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• 2021

As Head-Mounted Displays(HMDs), which are mainly used to maximize realism in games and videos, have experienced increased demand and expanded scope of use in education and training, there is growing interest in methods to enhance the performance of conventional HMDs. In this study, a methodology to utilize Carbon NanoTubes(CNTs) to improve the performance of gate drivers that send control signals to each pixel circuit of the HMD is discussed. This paper proposes a new circuit design method that replaces the transistors constituting the buffer part of the conventional gate driver with transistors incorporating CNTs and compare the performance of the suggested gate drive with that of a gate driver comprising only conventional transistors via simulations. According to the simulation results, by including CNTs in the gate driver, the output voltage can be increased by approximately 0.3V compared to the conventional gate driver high voltage(1.1V) at a speed of 12.5 GHz and the gate width also can be reduced by up to 20 times.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.522-529
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• 2013

In this paper, simple but very effective techniques to suppress subthreshold hump effect for high-voltage (HV) complementary metal-oxide-semiconductor (CMOS) technology are presented. Two methods are proposed to suppress subthreshold hump effect using a simple layout modification approach. First, the uniform gate oxide method is based on the concept of an H-shaped gate layout design. Second, the gate work function control method is accomplished by local ion implantation. For our experiments, $0.18{\mu}m$ 20 V class HV CMOS technology is applied for HV MOSFETs fabrication. From the measurements, both proposed methods are very effective for elimination of the inverse narrow width effect (INWE) as well as the subthreshold hump.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.1
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• pp.31-35
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• 2020

This study demonstrates metal-oxide based memtransistor device and the gate tunable memristive characteristic using atomic layer deposition (ALD) and ZnO n-type oxide semiconductor. We fabricated a memtransistor device having channel width 70 ㎛, channel length 5 ㎛, back gate, using 40 nm thick ZnO thin film, and measured gate-tunable memristive characteristics at each gate voltage (50V, 30V, 10V, 0V, -10V, -30V, -50V) under humidity of 40%, 50%, 60%, and 70% respectively, in order to investigate the relation between a memristive characteristic and hydrogen doping effect on the ZnO memtransistor device. The electron mobility and gate controllability of memtransistor device decreased with an increase of humidity due to increased electron carrier concentration by hydrogen doping effect. The gate-tunable memristive characteristic was observed under humidity of 60% 70%. Resistive switching ratio increased with an increase of humidity while it loses gate controllability. Consequently, we could obtain both gate controllability and the large resistive switching ratio under humidity of 60%.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.04b
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• pp.10-13
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• 2000

The notching effect in etching of un doped amorphous silicon gate had different characteristics and mechanism comparing with reported ones. The undoped amorphous silicon was etched by using HBr gas plasma, First, in the region of small line width, the potential was increased as a result of ions in the exposed surface of oxide, and the incident ions between the small line width were deflected more wide range, therefore the depth of notching was shallow and wide, Second, in the region of large line width of gate, electrons were charged on the top of photoresist and the side of gate, a part of ions deflected, The deflected ions were locally charged positive on the side of gate, and then the potential difference was produced, therefore, ions stored up more at independent line than at dense line, and nothing became deeper by Br ion bombardment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.354-355
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• 2008

The sensitivity and sensing margin of SOI(silicon on insulator) nano-wire BioFET(field effect transistor) were investigated by using back-gate bias. The channel conductance modulation was affected by doping concentration, channel length and channel width. In order to obtain high sensitivity and large sensing margin, low doping concentration, long channel and narrow width are required. We confirmed that the electrical sensing by back-gate bias is effective method for evaluation and optimization of bio-sensor.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.28 no.3B
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• pp.297-306
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• 2008

In order to determine the effects of lock gate expansion at the Lake Youngsan and Yeongam as well as increase in the width of the connecting channel of the two lakes on flood control downstream of the Youngsan River, an unsteady hydraulic flood routing was conducted by combining the Lake Youngsan and Yeongam as a single connected system. The coupled operation of the two lakes was found to have little effect when the widths of the lock gates and the connecting channel are set at the current level. It was also found that increasing the width of the connecting channel as well as the lock gate of the Lake Yeongam is an effective means of reducing the stage of the Lake Youngsan, whereas an increase in the width of the Lake Youngsan's lock gate had a relatively smaller effect. The extended width of the connecting channel leads to a rise in the stage of the Lake Yeongam. In order to reduce the elevated stage, The Lake Yeongam's lock gate must be expanded along with the Lake Yeongsan's lock gate. The analysis found that the stage of the Lake Yeongsan can be effectively controlled through adjustment of opening and shutting criteria of the connecting channel's lock gate, when diversion discharge between the lakes is increased as a result of expanding the width of the connecting channel.